Schedulability analysis of global memory-predictable scheduling

2014 Proceedings of the International Conference on Embedded Software, EMSOFT 2014

Volumn , Issue , 2014, Pages

  Alhammad, Ahmed ^a   Pellizzoni, Rodolfo ^a  

^a UNIVERSITY OF WATERLOO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; INTERACTIVE COMPUTER SYSTEMS; PROGRAM PROCESSORS;

EXECUTION MODEL; EXTENSIVE SIMULATIONS; MAIN MEMORY; MULTI-CORE CPUS; SCHEDULABILITY ANALYSIS; TEMPORAL BEHAVIOR;

REAL TIME SYSTEMS;

EID: 84910147661     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2656045.2656070     Document Type: Conference Paper

References (26)

1. A. Alhammad and R. Pellizzoni. Time-predictable execution of multithreaded applications on multicore systems. In DATE. IEEE, 2014.
2. T. P. Baker. Multiprocessor edf and deadline monotonic schedulability analysis. In RTSS, pages 120-129. IEEE, 2003.
3. S. Baruah. Techniques for multiprocessor global schedulability analysis. In RTSS, pages 119-128. IEEE, 2007.
4. S. K. Baruah. The non-preemptive scheduling of periodic tasks upon multiprocessors. Real-Time Systems, 32(1-2): 9-20, 2006.
5. A. Bastoni, B. Brandenburg, and J. Anderson. Cache-related preemption and migration delays: Empirical approximation and impact on schedulability. Proceedings of OSPERT, pages 33-44, 2010.
6. M. Bertogna, M. Cirinei, and G. Lipari. Improved schedulability analysis of edf on multiprocessor platforms. In ECRTS, pages 209-218. IEEE, 2005.
7. F. Boniol, H. Cassé, E. Noulard, and C. Pagetti. Deterministic execution model on cots hardware. In Architecture of Computing Systems (ARCS), pages 98-110. Springer, 2012.
8. B. B. Brandenburg, J. M. Calandrino, and J. H. Anderson. On the scalability of real-time scheduling algorithms on multicore platforms: A case study. In RTSS, pages 157-169. IEEE, 2008.
9. R. I. Davis and A. Burns. Improved priority assignment for global fixed priority pre-emptive scheduling in multiprocessor real-time systems. Real-Time Systems, 47(1):1-40, 2011.
10. R. I. Davis and A. Burns. A survey of hard real-time scheduling for multiprocessor systems. ACM Computing Surveys (CSUR), 43(4):35, 2011.
11. R. I. Davis, A. Burns, J. Marinho, V. Nelis, S. M. Petters, and M. Bertogna. Global fixed priority scheduling with deferred preemption. In RTCSA, pages 1-11, 2013.
12. E. Ebrahimi, C. J. Lee, O. Mutlu, and Y. N. Patt. Fairness via source throttling: a configurable and high-performance fairness substrate for multi-core memory systems. In ACM Sigplan Notices, Volume 45, pages 335-346. ACM, 2010.
13. N. Guan, W. Yi, Q. Deng, Z. Gu, and G. Yu. Schedulability analysis for non-preemptive fixed-priority multiprocessor scheduling. Journal of Systems Architecture, 57(5):536-546, 2011.
14. N. Guan, W. Yi, Z. Gu, Q. Deng, and G. Yu. New schedulability test conditions for non-preemptive scheduling on multiprocessor platforms. In RTSS, pages 137-146. IEEE, 2008.
15. H. Leontyev and J. H. Anderson. A unified hard/soft real-time schedu-lability test for global edf multiprocessor scheduling. In RTSS, pages 375-384. IEEE, 2008.
16. L. Lundberg. Multiprocessor scheduling of age constraint processes. In RTCSA, pages 42-47. IEEE, 1998.
17. K. J. Nesbit, N. Aggarwal, J. Laudon, and J. E. Smith. Fair queuing memory systems. In MICRO, pages 208-222. IEEE, 2006.
18. J. Nowotsch, M. Paulitsch, A. Henrichsen, P. Werner, and S. Andreas. Monitoring and wcet analysis in cots multi-core-soc-based mixed-criticality systems. In DATE. IEEE, 2014.
19. R. Pellizzoni, E. Betti, S. Bak, G. Yao, J. Criswell, M. Caccamo, and R. Kegley. A predictable execution model for cots-based embedded systems. In RTAS, pages 269-279. IEEE, 2011.
20. R. Pellizzoni, A. Schranzhofer, J.-J. Chen, M. Caccamo, and L. Thiele. Worst case delay analysis for memory interference in multicore systems. In DATE, pages 741-746. European Design and Automation Association, 2010.
21. J. Rosen, A. Andrei, P. Eles, and Z. Peng. Bus access optimization for predictable implementation of real-time applications on multiprocessor systems-on-chip. In RTSS, pages 49-60. IEEE, 2007.
22. A. Schranzhofer, J.-J. Chen, and L. Thiele. Timing predictability on multi-processor systems with shared resources. In Embedded Systems Week-Workshop on Reconciling Performance with Predictability, 2009.
23. R. Wilhelm, D. Grund, J. Reineke, M. Schlickling, M. Pister, and C. Ferdinand. Memory hierarchies, pipelines, and buses for future architectures in time-critical embedded systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 28(7):966-978, 2009.
24. G. Yao, R. Pellizzoni, S. Bak, E. Betti, and M. Caccamo. Memory-centric scheduling for multicore hard real-time systems. Real-Time Systems, 48(6):681-715, 2012.
25. H. Yun, G. Yao, R. Pellizzoni, M. Caccamo, and L. Sha. Memguard: Memory bandwidth reservation system for efficient performance isolation in multi-core platforms. In RTAS, pages 55-64. IEEE, 2013.
26. S. Zhuravlev, S. Blagodurov, and A. Fedorova. Addressing shared resource contention in multicore processors via scheduling. In ACM SIGARCH Computer Architecture News, Volume 38, pages 129-142. ACM, 2010.