WCET derivation under single core equivalence with explicit memory budget assignment

Leibniz International Proceedings in Informatics, LIPIcs

Volumn 76, Issue , 2017, Pages 31-323

  Mancuso, Renato ^a   Pellizzoni, Rodolfo ^b   Tokcan, Neriman ^a   Caccamo, Marco ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

^b UNIVERSITY OF WATERLOO   (Canada)

Author keywords

Certification; Dram management; Real time multicore; Single core equivalence; WCET

Indexed keywords

BANDWIDTH; BUDGET CONTROL; DYNAMIC RANDOM ACCESS STORAGE; INTERACTIVE COMPUTER SYSTEMS;

ANALYSIS STRATEGIES; BUDGET DISTRIBUTION; CERTIFICATION; HARDWARE RESOURCES; MULTI CORE; MULTI-CORE PLATFORMS; SINGLE-CORE EQUIVALENCE; WCET;

REAL TIME SYSTEMS;

EID: 85037745750     PISSN: 18688969     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.4230/LIPIcs.ECRTS.2017.3     Document Type: Conference Paper

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