Bounding and reducing memory interference in COTS-based multi-core systems

Real-Time Systems

Volumn 52, Issue 3, 2016, Pages 356-395

  Kim, Hyoseung ^a   de Niz, Dionisio ^b   Andersson, Björn ^b   Klein, Mark ^b   Mutlu, Onur ^a   Rajkumar, Ragunathan ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

^b CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

Bank partitioning; DRAM; Memory controller; Memory interference; Multi core; Task allocation

Indexed keywords

COMPUTER OPERATING SYSTEMS; INTERACTIVE COMPUTER SYSTEMS; REAL TIME SYSTEMS;

BANK PARTITIONING; MEMORY CONTROLLER; MEMORY INTERFERENCES; MULTI CORE; TASK ALLOCATION;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 84959176441     PISSN: 09226443     EISSN: 15731383     Source Type: Journal    
DOI: 10.1007/s11241-016-9248-1     Document Type: Article

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