Deterministic memory abstraction and supporting multicore system architecture

Leibniz International Proceedings in Informatics, LIPIcs

Volumn 106, Issue , 2018, Pages

  Farshchi, Farzad ^a   Valsan, Prathap Kumar ^b   Mancuso, Renato ^c   Yun, Heechul ^a  

^a UNIVERSITY OF KANSAS   (United States)

^b INTEL CORPORATION   (United States)

^c BOSTON UNIVERSITY   (United States)

Author keywords

DRAM controller; Linux; Multicore processors; Real time; Shared cache

Indexed keywords

ABSTRACTING; DYNAMIC RANDOM ACCESS STORAGE; HARDWARE; INTERACTIVE COMPUTER SYSTEMS; LINUX; MEMORY ARCHITECTURE; REAL TIME SYSTEMS;

ARCHITECTURE DESIGNS; CONVENTIONAL MEMORY; HOLISTIC RESOURCE MANAGEMENTS; MULTI-CORE PROCESSOR; REAL TIME; REAL TIME COMPUTING; SHARED CACHE; TIME PREDICTABILITIES;

CACHE MEMORY;

EID: 85049324363     PISSN: 18688969     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.4230/LIPIcs.ECRTS.2018.1     Document Type: Conference Paper

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