T-CREST: Time-predictable multi-core architecture for embedded systems

Journal of Systems Architecture

Volumn 61, Issue 9, 2015, Pages 449-471

  Schoeberl, Martin ^a   Abbaspour, Sahar ^a   Akesson, Benny ^b   Audsley, Neil ^c   Capasso, Raffaele ^d   Garside, Jamie ^b   Goossens, Kees ^e   Goossens, Sven ^e   Hansen, Scott ^f   Heckmann, Reinhold ^g   Hepp, Stefan ^h   Huber, Benedikt ^h   Jordan, Alexander ^a   Kasapaki, Evangelia ^a   Knoop, Jens ^h   Li, Yonghui ^e   Prokesch, Daniel ^h   Puffitsch, Wolfgang ^a   Puschner, Peter ^h   Rocha, André ⁱ   Silva, Cláudio ⁱ   Sparsø, Jens ^a   Tocchi, Alessandro ^d   more..

^a TECHNICAL UNIVERSITY OF DENMARK   (Denmark)

^b CZECH TECHNICAL UNIVERSITY IN PRAGUE   (Czech Republic)

^c UNIVERSITY OF YORK   (United Kingdom)

^d Intecs SpA   (Italy)

^e EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

^f Open Group   (Belgium)

^g AbsInt Angewandte Informatik GmbH   (Germany)

^h VIENNA UNIVERSITY OF TECHNOLOGY   (Austria)

ⁱ GMV ^*  (Portugal)

Author keywords

Real time systems; Time predictable computer architecture

Indexed keywords

DISTRIBUTED COMPUTER SYSTEMS; EMBEDDED SYSTEMS; INTERACTIVE COMPUTER SYSTEMS; MEMORY ARCHITECTURE; MICROPROCESSOR CHIPS; NETWORK ARCHITECTURE; NETWORK-ON-CHIP; PROGRAM COMPILERS; REAL TIME SYSTEMS; SIGNAL PROCESSING; STATIC ANALYSIS; VLSI CIRCUITS;

COLLABORATIVE RESEARCH; COMPUTATION-INTENSIVE TASK; EUROPEAN COMMISSION; INDUSTRIAL USE CASE; MULTI-CORE PROCESSOR; MULTICORE ARCHITECTURES; SIGNAL PROCESSING APPLICATIONS; WORST-CASE EXECUTION TIME;

COMPUTER ARCHITECTURE;

EID: 84938494470     PISSN: 13837621     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sysarc.2015.04.002     Document Type: Article

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