Worst-case execution time analysis for many-core architectures with NoC

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 9884 LNCS, Issue , 2016, Pages 211-227

  Skalistis, Stefanos ^a   Simalatsar, Alena ^a  

^a EPFL   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

MEMORY ARCHITECTURE; NETWORK-ON-CHIP; OPTIMIZATION; TIME SHARING SYSTEMS;

APPLICATION PARTITIONING; CYCLIC DEPENDENCIES; MANY-CORE ARCHITECTURE; OPTIMAL DEPLOYMENT; OPTIMISATION PROBLEMS; REAL TIME GUARANTEES; WORST-CASE EXECUTION TIME; WORST-CASE EXECUTION TIME ANALYSIS;

COMPUTER ARCHITECTURE;

EID: 84984906749     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-319-44878-7_13     Document Type: Conference Paper

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