A formal approach to the WCRT analysis of multicore systems with memory contention under phase-structured task sets

Real-Time Systems

Volumn 50, Issue 5-6, 2014, Pages 736-773

  Lampka, Kai ^a   Giannopoulou, Georgia ^b   Pellizzoni, Rodolfo ^c   Wu, Zheng ^c   Stoimenov, Nikolay ^b  

^a UPPSALA UNIVERSITY   (Sweden)

^b ETH ZURICH   (Switzerland)

^c UNIVERSITY OF WATERLOO   (Canada)

Author keywords

Multicore systems; Predictable execution model; Real time performance analysis; Real time simulation; Resource contention; Timed model checking; Worst case response time analysis

Indexed keywords

CACHE MEMORY; MEMORY ARCHITECTURE; MODEL CHECKING; PHASE STRUCTURE; PRODUCTIVITY; RESPONSE TIME (COMPUTER SYSTEMS);

EXECUTION MODEL; MULTI-CORE SYSTEMS; REAL TIME PERFORMANCE; REAL TIME SIMULATIONS; RESOURCE CONTENTION; TIMED MODEL CHECKING; WORST CASE RESPONSE TIME;

REAL TIME SYSTEMS;

EID: 84910111811     PISSN: 09226443     EISSN: 15731383     Source Type: Journal    
DOI: 10.1007/s11241-014-9211-y     Document Type: Article

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