Mixed-criticality scheduling with memory bandwidth regulation

Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018

Volumn 2018-January, Issue , 2018, Pages 1277-1282

  Awan, Muhammad Ali ^a   Souto, Pedro F ^b   Bletsas, Konstantinos ^a   Akesson, Benny ^a   Tovar, Eduardo ^a  

^a POLYTECHNIC INSTITUTE OF PORTO   (Portugal)

^b UNIVERSITY OF PORTO   (Portugal)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; MEMORY ARCHITECTURE;

MEMORY BANDWIDTHS; MIXED CRITICALITIES; MIXED-CRITICALITY SYSTEMS; MULTI-CORE SYSTEMS; MULTICORE SYSTEM DESIGNS; SAFETY GUARANTEES; SCHEDULABILITY ANALYSIS; TEMPORAL BEHAVIOUR;

CRITICALITY (NUCLEAR FISSION);

EID: 85048758454     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.23919/DATE.2018.8342211     Document Type: Conference Paper

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