Static bus schedule aware scratchpad allocation in multiprocessors

Proceedings of the ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES)

Volumn , Issue , 2011, Pages 11-20

  Chattopadhyay, Sudipta ^a   Roychoudhury, Abhik ^a  

^a NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

Author keywords

MPSoC; Scratchpad; Shared bus; WCET

Indexed keywords

ALLOCATION METHODS; COMPILE TIME; EMBEDDED APPLICATION; EXECUTION TIME; EXTERNAL MEMORY; IN-ORBIT; MEMORY ALLOCATION; MEMORY BLOCKS; MPSOC; MULTI-PROCESSOR PLATFORMS; MULTIPROCESSOR-SYSTEM; ON CHIPS; POWER CONSUMPTION; PROCESSOR EXECUTION; PROGRAM EXECUTION; REAL-WORLD; SCRATCH PAD MEMORY; SCRATCHPAD; SHARED BUS; WAITING-TIME; WCET;

BUSES; EMBEDDED SOFTWARE; EMBEDDED SYSTEMS; GLOBAL OPTIMIZATION; MEMORY ARCHITECTURE; MULTIPROCESSING SYSTEMS; OPTIMIZATION; PROGRAM COMPILERS; SPACE PLATFORMS; UNMANNED AERIAL VEHICLES (UAV);

CACHE MEMORY;

EID: 79955656987     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1967677.1967680     Document Type: Conference Paper

References (19)

1. M.T. Kandemir, J. Ramanujam, and A.N. Choudhary. Exploiting shared scratch pad memory space in embedded multiprocessor systems. In DAC, 2002.
2. J.-F. Deverge and I. Puaut. WCET-directed dynamic scratchpad memory allocation of data. In ECRTS, 2007.
3. P. R. Panda, N. D. Dutt, and A. Nicolau. On-chip vs. off-chip memory: the data partitioning problem in embedded processor-based systems. ACM Trans. Des. Autom. Electron. Syst., 5(3), 2000.
4. M. Verma, L. Wehmeyer, and P. Marwedel. Cache-aware scratchpad allocation algorithm. In DATE, 2004.
5. S. Steinke, L. Wehmeyer, B. Lee, and P. Marwedel. Assigning program and data objects to scratchpad for energy reduction. In DATE, 2002.
6. S. Udayakumaran and R. Barua. Compiler-decided dynamic memory allocation for scratch-pad based embedded systems. In CASES, 2003.
7. M. Verma, L. Wehmeyer, and P. Marwedel. Dynamic overlay of scratchpad memory for energy minimization. In CODES+ISSS, 2004.
8. V. Suhendra, T. Mitra, A. Roychoudhury, and T. Chen. WCET centric data allocation to scratchpad memory. In RTSS, 2005.
9. I. Puaut. WCET-centric software-controlled instruction caches for hard real-time systems. In ECRTS, 2006.
10. H. Falk and J.C. Kleinsorge. Optimal static WCET-aware scratchpad allocation of program code. In DAC, 2009.
11. M. Verma, K. Petzold, L. Wehmeyer, H. Falk, and P. Marwedel. Scratchpad sharing strategies for multiprocess embedded systems: A first approach. In ESTImedia, 2005.
12. V. Suhendra, C. Raghavan, and T. Mitra. Integrated scratchpad memory optimization and task scheduling for MPSoC architectures. In CASES, 2006.
13. M. Kandemir, O. Ozturk, and M. Karakoy. Dynamic on-chip memory management for chip multiprocessors. In CASES, 2004.
14. V. Suhendra, A. Roychoudhury, and T. Mitra. Scratchpad allocation for concurrent embedded software. ACM Trans. Program. Lang. Syst., 32(4), 2010.
15. S. Chattopadhyay, A. Roychoudhury, and T. Mitra. Modeling shared cache and bus in multi-cores for timing analysis. In SCOPES, 2010.
16. D. J. A. Welsh and M. B. Powell. An upper bound for the chromatic number of a graph and its application to timetabling problems. The Computer Journal, 10(1), 1967.
17. European Space Agency. DEBIE - First standard space debris monitoring instrument, 2008. Available at: http://gate.etamax.de/edid/publicaccess/debie1. php.
18. F. Nemer, H. Cassé, P. Sainrat, J.P. Bahsoun, and M. De Michiel. Papabench: a free real-time benchmark. In WCET Workshop, 2006.
19. M. Gschwind. The Cell broadband engine: exploiting multiple levels of parallelism in a chip multiprocessor. Int. J. Parallel Program., 35(3), 2007.