메뉴 건너뛰기




Volumn , Issue , 2012, Pages 99-108

A unified WCET analysis framework for multi-core platforms

Author keywords

multi core; shared bus; shared cache; WCET analysis

Indexed keywords

BENCHMARK PROGRAMS; BRANCH PREDICTORS; MULTI CORE; MULTI-CORE PLATFORMS; MULTI-CORE PROCESSOR; MULTICORE ARCHITECTURES; SHARED BUS; SHARED CACHE; TIMING ANOMALIES; WCET ANALYSIS; WORST-CASE EXECUTION TIME ANALYSIS;

EID: 84862001438     PISSN: 10801812     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RTAS.2012.26     Document Type: Conference Paper
Times cited : (50)

References (18)
  • 2
    • 51249094583 scopus 로고    scopus 로고
    • WCET analysis for multi-core processors with shared L2 instruction caches
    • J. Yan and W. Zhang. WCET analysis for multi-core processors with shared L2 instruction caches. In RTAS, 2008.
    • (2008) RTAS
    • Yan, J.1    Zhang, W.2
  • 3
    • 77649293394 scopus 로고    scopus 로고
    • Timing analysis of concurrent programs running on shared cache multi-cores
    • Y. Li et. al. Timing analysis of concurrent programs running on shared cache multi-cores. In RTSS, 2009.
    • (2009) RTSS
    • Li, Y.1
  • 4
    • 77955134392 scopus 로고    scopus 로고
    • Modeling shared cache and bus in multi core platforms for timing analysis
    • S. Chattopadhyay, A. Roychoudhury, and T. Mitra. Modeling shared cache and bus in multi core platforms for timing analysis. In SCOPES, 2010.
    • (2010) SCOPES
    • Chattopadhyay, S.1    Roychoudhury, A.2    Mitra, T.3
  • 5
    • 80052979914 scopus 로고    scopus 로고
    • Bus aware multicore WCET analysis through TDMA offset bounds
    • T. Kelter et. al. Bus aware multicore WCET analysis through TDMA offset bounds. In ECRTS, 2011.
    • (2011) ECRTS
    • Kelter, T.1
  • 6
    • 79951799430 scopus 로고    scopus 로고
    • Combining abstract interpretation with model checking for timing analysis of multicore software
    • M. Lv et. al. Combining abstract interpretation with model checking for timing analysis of multicore software. In RTSS, 2010.
    • (2010) RTSS
    • Lv, M.1
  • 7
    • 36048974180 scopus 로고    scopus 로고
    • Chronos: A timing analyzer for embedded software
    • X. Li et. al. Chronos: A timing analyzer for embedded software. Science of Computer Programming, 2007. http://www.comp.nus.edu.sg/~rpembed/chronos.
    • (2007) Science of Computer Programming
    • Li, X.1
  • 8
    • 0036469652 scopus 로고    scopus 로고
    • Simplescalar: An infrastructure for computer system modeling
    • T. Austin, E. Larson, and D. Ernst. Simplescalar: An infrastructure for computer system modeling. Computer, 35(2), 2002.
    • (2002) Computer , vol.35 , Issue.2
    • Austin, T.1    Larson, E.2    Ernst, D.3
  • 9
    • 84944317742 scopus 로고    scopus 로고
    • WCET benchmarks. http://www.mrtc.mdh.se/projects/wcet/benchmarks.html.
    • WCET Benchmarks
  • 10
    • 22844455988 scopus 로고    scopus 로고
    • Performance estimation of embedded software with instruction cache modeling
    • Y-T. S. Li, S. Malik, and A. Wolfe. Performance estimation of embedded software with instruction cache modeling. ACM Trans. Des. Autom. Electron. Syst., 4(3), 1999.
    • (1999) ACM Trans. Des. Autom. Electron. Syst. , vol.4 , Issue.3
    • Li, Y.-T.S.1    Malik, S.2    Wolfe, A.3
  • 11
    • 0033750056 scopus 로고    scopus 로고
    • Fast and precise WCET prediction by separated cache and path analyses
    • H. Theiling, C. Ferdinand, and R. Wilhelm. Fast and precise WCET prediction by separated cache and path analyses. Real-Time Systems, 18(2/3), 2000.
    • (2000) Real-time Systems , vol.18 , Issue.2-3
    • Theiling, H.1    Ferdinand, C.2    Wilhelm, R.3
  • 12
    • 33747319225 scopus 로고    scopus 로고
    • Modeling out-of-order processors for WCET analysis
    • X. Li, A. Roychoudhury, and T. Mitra. Modeling out-of-order processors for WCET analysis. Real-Time Systems, 34(3), 2006.
    • (2006) Real-time Systems , vol.34 , Issue.3
    • Li, X.1    Roychoudhury, A.2    Mitra, T.3
  • 13
    • 10444244120 scopus 로고    scopus 로고
    • Modeling control speculation for timing analysis
    • X. Li, T. Mitra, and A. Roychoudhury. Modeling control speculation for timing analysis. Real-Time Systems, 29(1), 2005.
    • (2005) Real-time Systems , vol.29 , Issue.1
    • Li, X.1    Mitra, T.2    Roychoudhury, A.3
  • 14
    • 77649302111 scopus 로고    scopus 로고
    • Using bypass to tighten WCET estimates for multi-core processors with shared instruction caches
    • D. Hardy, T. Piquet, and I. Puaut. Using bypass to tighten WCET estimates for multi-core processors with shared instruction caches. In RTSS, 2009.
    • (2009) RTSS
    • Hardy, D.1    Piquet, T.2    Puaut, I.3
  • 15
    • 48649100636 scopus 로고    scopus 로고
    • Bus access optimization for predictable implementation of realtime applications on multiprocessor systems-on-chip
    • J. Rosen et. al. Bus access optimization for predictable implementation of realtime applications on multiprocessor systems-on-chip. In RTSS, 2007.
    • (2007) RTSS
    • Rosen, J.1
  • 16
    • 70450235469 scopus 로고    scopus 로고
    • Hardware support for WCET analysis of hard real-time multicore systems
    • M. Paolieri et. al. Hardware support for WCET analysis of hard real-time multicore systems. In ISCA, 2009.
    • (2009) ISCA
    • Paolieri, M.1
  • 17
    • 84866441014 scopus 로고    scopus 로고
    • A predictable execution model for COTS-based embedded systems
    • R. Pellizzoni et. al. A predictable execution model for COTS-based embedded systems. In RTAS, 2011.
    • (2011) RTAS
    • Pellizzoni, R.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.