Bus access optimization for predictable implementation of real-time applications on multiprocessor systems-on-chip

Proceedings - Real-Time Systems Symposium

Volumn , Issue , 2007, Pages 49-60

  Rosén, Jakob ^a   Andrei, Alexandru ^a   Eles, Petru ^a   Peng, Zebo ^a  

^a LINKÖPING UNIVERSITY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

ARSENIC; BUSES; DATA TRANSFER; EMBEDDED SYSTEMS; FAULT TOLERANCE; MULTIPROCESSING SYSTEMS; OPTIMIZATION; QUALITY ASSURANCE; RELIABILITY; SCHEDULING;

CACHE MISSES; DATA DEPENDENCIES; MULTI-PROCESSOR SOC; MULTI-PROCESSOR SYSTEMS; MULTIPROCESSOR SYSTEMS ON CHIPS; REAL-TIME APPLICATIONS; SCHEDULING POLICIES; SINGLE PROCESSORS; SYSTEM SCHEDULING; WCET ANALYSIS; WORST-CASE EXECUTION TIME ANALYSIS;

REAL TIME SYSTEMS;

EID: 48649100636     PISSN: 10528725     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RTSS.2007.24     Document Type: Conference Paper

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