Fundamentals of silicon material properties for successful exploitation of strain engineering in modern CMOS manufacturing

IEEE Transactions on Electron Devices

Volumn 53, Issue 5, 2006, Pages 944-964

  Chidambaram, P R ^a   Bowen, Chris ^a   Chakravarthi, Srinivasan ^a   Machala, Charles ^a   Wise, Rick ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

CMOS; Defect; Device; Diffusion; Dislocation; Electron; Hole; Intrinsic; Isolation; Layout; Metrology; Mobility; Model; NMOS; PMOS; Process; SiGe; Strain; Stress; Temperature

Indexed keywords

CMOS INTEGRATED CIRCUITS; CRYSTAL DEFECTS; DEFORMATION; DIFFUSION; DISLOCATIONS (CRYSTALS); ELECTRON MOBILITY; HIGH TEMPERATURE OPERATIONS; SEMICONDUCTOR DEVICE MANUFACTURE; STRAIN; TRANSISTORS;

CHEMICAL PROPERTIES; SILICON MATERIAL PROPERTIES; STRAIN ENGINEERING; THERMAL PROCESSING;

SEMICONDUCTING SILICON;

EID: 33646090139     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2006.872912     Document Type: Review

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