Electrical analysis of mechanical stress induced by STI in short MOSFETs using externally applied stress

IEEE Transactions on Electron Devices

Volumn 51, Issue 8, 2004, Pages 1254-1261

  Gallon, C ^a   Reimbold, G ^e   Ghibaudo, Gérard ^b   Bianchi, R A ^c   Gwoziecki, R ^a,c   Orain, S ^d   Robilliart, E ^c   Raynaud, C ^a,c   Dansas, H ^e  

^a CEA LETI   (France)

^b IMEP LAHC   (France)

^c STMICROELECTRONICS   (France)

^d PHILIPS RESEARCH LABORATORIES   (Germany)

^e NONE

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CURRENTS; ELECTRIC RESISTANCE; SEMICONDUCTOR DEVICE TESTING; SEMICONDUCTOR DOPING; SILICON ON INSULATOR TECHNOLOGY; TENSILE STRESS; TRANSISTORS;

DOPING AMORPHIZATION; ELECTRICAL ANALYSIS; EXTERNAL MECHANICAL STRESS; PIEZORESISTIVE COEFFICIENTS MEASUREMENT; SHALLOW TRENCH ISOLATION; SOURCE DRAIN RESISTANCE;

MOSFET DEVICES;

EID: 3943051393     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2004.831358     Document Type: Article

References (15)

1. A. Hamada, T. Furusawa, N. Saito, and E. Takeda, "A new aspect of mechanical stress effects in scaled MOS devices," IEEE Trans. Electron Devices, vol. 38, pp. 895-900, June 1991.
2. K. Rim, J. L. Hoyt, and J. F. Gibbons, "Transconductance enhancement in deep submicron strained Si -MOSFETs," in IEDM Tech Dig., 1998, pp. 707-710.
3. G. Scott, J. Lutze, M. Rubin, F. Nouri, and M. Manley, "NMOS drive current reduction caused by transistor layout and trench isolation induced stress," in IEDM Tech Dig., 1999, pp. 827-830.
4. W. G. En, D.-H. Ju, D. Chan, S. Chan, and O. Karlson, "Reduction of STI/active stress on 0.18 μm SOI devices through modification of STI process," in IEEE Int. SOI Conf., 2001, pp. 85-86.
5. P. Ferreira, R. A. Bianchi, F. Guyader, R. Pantel, and E. Granger, "Elimination of stress induced silicon defects in very high-density sram structures," in Proc. ESSDERC, 2001, p. 427.
6. R. A. Bianchi, G. Bouche, and O. Roux-dit-Buisson, "Accurate modeling of trench isolation mechanical stress effects on MOSFET electrical performance," in IEDM Tech Dig., 2002, p. 117.
7. C.-L. Huang, H. R. Soleimani, G. J. Grula, J. W. Sleight, A. Villani, H. Ali, and D. A. Antoniadis, "Locos-induced stress effects on thin-film SOI devices," IEEE Trans. Electron Devices, vol. 44, pp. 646-650, Mar. 1997.
8. C. Gallon, G. Reimbold, G. Ghibaudo, R. A. Bianchi, and R. Gwoziecki, "Electrical analysis of external mechanical stress effects in short-channel MOSFETs on (001) silicon," Solid State Electron., vol. 48, pp. 561-566, 2004.
9. A. T. Bradley, R. C. Jaeger, J. C. Suhling, and K. J. O'Connor, "Piezoresistive characteristics of short-channel MOSFETs on (100) silicon," IEEE Trans. Electron Devices, vol. 48, pp. 2009-2015, Dec. 2001.
10. Y. G. Wang, D. B. Scott, J. Wu, J. L. Hu, K. Liu, and V. Ukraintsev, "Effects of uniaxial mechanical stress on drive current of 0.13 μm MOSFETs," IEEE Trans. Electron Devices, vol. 51, pp. 529-531, Mar. 2003.
11. Z. Z. Wang, J. Suski, and D. Collard, "Piezoresistive simulation in MOSFETs," Sens. Actuators A, vol. 37-38, pp. 357-364, 1993.
12. Y. Taur, D. S. Zicherman, D. R. Lombardi, P. J. Restle, C. H. Hsu, H. I. Nanafi, M. R. Wordeman, B. Davari, and G. G. Shadidi, "A new shift and ratio method for MOSFET channel-length extraction," IEEE Electron Devices Lett., vol. 13, pp. 267-269, May 1992.
13. Y. M. Sheu, K. Y. Y. doong, C. H. Lee, M. J. Chen, and C. H. Diaz, "Study on STI mechanical stress-induced variations on advanced CMOSFETs," in ICMTS Tech Dig., 2003, pp. 205-208.
14. A. Lochtefeld and D. A. Antoniadis, "Investigating relationship between electron mobility and velocity in deeply scaled NMOS via mechanical stress," IEEE Electron Device Lett., vol. 22, pp. 591-593, Dec. 2001.
15. A. Witvrouw and F. Spaepen, "Viscosity and elastic constant of amorphous Si and Ge," J. Appl Phys., vol. 74, pp. 7144-7161, 1993.