An enhanced 90nm high performance technology with strong performance improvements from stress and mobility increase through simple process changes

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2004, Pages 162-163

  Khamankar, R ^a   Bu, H ^a   Bowen, C ^a   Chakravarthi, S ^a   Chidambaram, P R ^a   Bevan, M ^a   Krishnan, A ^a   Niimi, H ^a   Smith, B ^a   Blatchford, J ^a   Hornung, B ^a   Lu, J P ^a   Nicollian, P ^a   Kirkpatrick, B ^a   Miles, D ^a   Hewson, M ^a   Farber, D ^a   Hall, L ^a   AlShareef, H ^a   Varghese, A ^a   Gurba, A ^a   Ukraintsev, V ^a   Rathsack, B ^a   DeLoach, J ^a   Tran, J ^a   Kaneshige, C ^a   Somervell, M ^a   Aur, S ^a   Machala, C ^a   Grider, T ^a   more..

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; CAPACITANCE; CARRIER MOBILITY; CHEMICAL VAPOR DEPOSITION; DIELECTRIC MATERIALS; LITHOGRAPHY; MASKS; METALLIZING; NITRIDES; OPTIMIZATION; RELIABILITY;

CHANNEL STRESS; INVERSE WIDE EFFECTS (INWE); PMOS POCKET IMPLANTS; SHEET RESISTANCE;

MOSFET DEVICES;

EID: 4544318336     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/vlsit.2004.1345456     Document Type: Conference Paper

References (2)

1. B. Homung et al Symp. on VLSI Tech., p. 95, 2003
2. P. Nicollian et al., IEDM Tech. Dig., p. 554, 2000