메뉴 건너뛰기




Volumn , Issue , 2007, Pages 1-440

Data converters

Author keywords

[No Author keywords available]

Indexed keywords


EID: 84892209853     PISSN: None     EISSN: None     Source Type: Book    
DOI: 10.1007/978-0-387-32486-9     Document Type: Book
Times cited : (231)

References (222)
  • 7
    • 0019543409 scopus 로고
    • Interpolation and decimation of digital signals - A tutorial review
    • R. E. Crochiere and L. R. Rabiner: Interpolation and decimation of digital signals - A tutorial review, Proceedings of the IEEE, vol. 69, pp. 300-331, 1981.
    • (1981) Proceedings of the IEEE , vol.69 , pp. 300-331
    • Crochiere, R.E.1    Rabiner, L.R.2
  • 9
    • 0025418849 scopus 로고
    • Fast fourier transforms: A tutorial review and a state of the art
    • P. Duhamel and M. Vetterli: Fast fourier transforms: A tutorial review and a state of the art, Signal Processing, vol. 19, pp. 259-299, 1990.
    • (1990) Signal Processing , vol.19 , pp. 259-299
    • Duhamel, P.1    Vetterli, M.2
  • 10
    • 0017558676 scopus 로고    scopus 로고
    • The shannon samplign theorem - Its various extension and appications: A tutorial review
    • A. J. Jerri: The Shannon Samplign Theorem - Its Various Extension and Appications: A Tutorial Review, Proceedings IEEE, Vol. 65, pp. 1565-1596, 1997.
    • (1997) Proceedings IEEE , vol.65 , pp. 1565-1596
    • Jerri, A.J.1
  • 13
    • 84892360247 scopus 로고    scopus 로고
    • EE241: Educational Material, Stanford University: Waves
    • EE241: Educational Material, Stanford University: Waves. http://sepwww.stanford.edu/ftp/prof/waves/toc html.
  • 16
    • 26844549058 scopus 로고    scopus 로고
    • Elsevier's Science & Technology, Burlington, MA
    • W. Kester (ed.): The Data Converter Handbook. Elsevier's Science & Technology, Burlington, MA, 2005.
    • (2005) The Data Converter Handbook
    • Kester, W.1
  • 17
    • 33747958105 scopus 로고    scopus 로고
    • High-speed data converters for communication systems
    • F. Maloberti: High-speed data converters for communication systems, in IEEE Circuits and Systems Magazine, vol. 1, no. 1, pp. 26-36, 2001.
    • (2001) IEEE Circuits and Systems Magazine , vol.1 , Issue.1 , pp. 26-36
    • Maloberti, F.1
  • 30
    • 0019246618 scopus 로고
    • Resistor termination in D/A and A/D converters
    • December
    • J. Huang: Resistor termination in D/A and A/D converters, IEEE Journal of Solid-State Circuits, vol. 15, pp. 1084-1087, December 1980.
    • (1980) IEEE Journal of Solid-State Circuits , vol.15 , pp. 1084-1087
    • Huang, J.1
  • 33
    • 0015743982 scopus 로고
    • A complete monolithic 10-b D/A converter
    • December
    • D. J. Dooley: A complete monolithic 10-b D/A converter, IEEE Journal of Solid-State Circuits, vol. 8, pp. 404-408, December 1973.
    • (1973) IEEE Journal of Solid-State Circuits , vol.8 , pp. 404-408
    • Dooley, D.J.1
  • 36
    • 0020894560 scopus 로고
    • A complete high-speed voltage output 16-bit monolithic DAC
    • J. R. Naylor: A complete high-speed voltage output 16-bit monolithic DAC, IEEE Journal of Solid-State Circuits, vol. 18, pp. 729-735, 1983.
    • (1983) IEEE Journal of Solid-State Circuits , vol.18 , pp. 729-735
    • Naylor, J.R.1
  • 38
    • 0025450377 scopus 로고
    • A 50MHz 10-bit CMOS digital-to-analog converter with 75 Ω buffer
    • M. Pelgrom: A 50MHz 10-bit CMOS digital-to-analog converter with 75 Ω buffer, IEEE International Solid-State Circuits Conference, vol. XXXIII, pp. 200-201, 1990.
    • (1990) IEEE International Solid-State Circuits Conference , vol.33 , pp. 200-201
    • Pelgrom, M.1
  • 42
    • 84881593757 scopus 로고
    • All-MOS charge redistribution analog-to-digital conversion techniques-Part II
    • R. E. Suarez, P. R. Gray, and D. A. Hodges: All-MOS charge redistribution analog-to-digital conversion techniques-Part II, IEEE Journal of Solid-State Circuits, vol. SC-10, pp. 379-385, 1975.
    • (1975) IEEE Journal of Solid-State Circuits , vol.SC-10 , pp. 379-385
    • Suarez, R.E.1    Gray, P.R.2    Hodges, D.A.3
  • 44
    • 0017243117 scopus 로고
    • A charge-transfer multiplying digital-to-analog converter
    • J. F. Albarrán and D. A. Hodges: A charge-transfer multiplying digital-to-analog converter, IEEE Journal of Solid-State Circuits, vol. 11, pp. 772-779, 1976.
    • (1976) IEEE Journal of Solid-State Circuits , vol.11 , pp. 772-779
    • Albarrán, J.F.1    Hodges, D.A.2
  • 45
  • 46
    • 8344250999 scopus 로고    scopus 로고
    • A dual 10-b 200-MSPS pipelined D/A converter with DLL-based clock synthesizer
    • G. Manganaro, S. Kwak, and A. R. Bugeja: A dual 10-b 200-MSPS pipelined D/A converter with DLL-based clock synthesizer, IEEE Journal of Solid-State Circuits, vol. SC-39, pp. 1829-1838, 2004.
    • (2004) IEEE Journal of Solid-State Circuits , vol.SC-39 , pp. 1829-1838
    • Manganaro, G.1    Kwak, S.2    Bugeja, A.R.3
  • 55
    • 29044439640 scopus 로고    scopus 로고
    • A 1.6-GS/s 12-bit return-to-zero GaAs RF DAC for multiple nyquist operation
    • M. Choe, K. Baek, and M. Teshome: A 1.6-GS/s 12-bit return-to-zero GaAs RF DAC for multiple nyquist operation, IEEE Journal of Solid-State Circuits, vol. SC-40, pp. 2456-2468, 2005.
    • (2005) IEEE Journal of Solid-State Circuits , vol.SC-40 , pp. 2456-2468
    • Choe, M.1    Baek, K.2    Teshome, M.3
  • 57
    • 0024123363 scopus 로고
    • An Algorithmic15-bitCMOS digital-to-analog converter
    • M. Pelgrom, M. Rooda: An Algorithmic15-bitCMOS Digital-to-Analog Converter, IEEEJournal of Solid-State Circuits, vol. 23, pp. 1402-1405, 1988.
    • (1988) IEEEJournal of Solid-State Circuits , vol.23 , pp. 1402-1405
    • Pelgrom, M.1    Rooda, M.2
  • 60
    • 0024719269 scopus 로고
    • Waveform degradation in VLSI interconnections
    • H. R. Kaupp: Waveform degradation in VLSI interconnections, IEEE Journal of Solid-State Circuits, vol. 24, 1150-1153, 1989.
    • (1989) IEEE Journal of Solid-State Circuits , vol.24 , pp. 1150-1153
    • Kaupp, H.R.1
  • 61
  • 62
    • 0030213799 scopus 로고    scopus 로고
    • Power-efficient metastability error reduction in CMOS flash A/D converters
    • C. L. Portmann and T. H. Y. Meng: Power-efficient metastability error reduction in CMOS flash A/D converters, IEEE Journal of Solid-State Circuits, vol. 31, pp. 1132-1140, 1996.
    • (1996) IEEE Journal of Solid-State Circuits , vol.31 , pp. 1132-1140
    • Portmann, C.L.1    Meng, T.H.Y.2
  • 65
    • 0035058178 scopus 로고    scopus 로고
    • A 6 b 1.1 GSample/s CMOS A/D converter
    • Digest of Technical Papers. ISSCC. 2001
    • Geelen, G.: A 6 b 1.1 GSample/s CMOS A/D converter, 2001 IEEE International Solid-State Circuits Conference, pp. 128-129, 2001, Digest of Technical Papers. ISSCC. 2001.
    • (2001) 2001 IEEE International Solid-State Circuits Conference , pp. 128-129
    • Geelen, G.1
  • 66
    • 0035696160 scopus 로고    scopus 로고
    • A 6-b 1.3-Gsample/s A/D converter in 0.35-μ m CMOS
    • M. Choi and A. A. Abidi: A 6-b 1.3-Gsample/s A/D converter in 0.35-μ m CMOS, IEEE Journal of Solid-State Circuits, vol. 36, pp. 1847-1858, 2001.
    • (2001) IEEE Journal of Solid-State Circuits , vol.36 , pp. 1847-1858
    • Choi, M.1    Abidi, A.A.2
  • 71
    • 0029510025 scopus 로고
    • A 70-MS/s 110-mW 8-b CMOS folding and interpolating A/D converter
    • B. Nauta and A. G. W. Venes: A 70-MS/s 110-mW 8-b CMOS folding and interpolating A/D converter, IEEE Journal of Solid-State Circuits, vol. 30, pp. 1302-1308, 1995.
    • (1995) IEEE Journal of Solid-State Circuits , vol.30 , pp. 1302-1308
    • Nauta, B.1    Venes, A.G.W.2
  • 72
    • 0031378861 scopus 로고    scopus 로고
    • A 12-b, 60-MSample/s cascaded folding and interpolating ADC
    • P. Vorenkamp and R. Roovers: A 12-b, 60-MSample/s cascaded folding and interpolating ADC, IEEE Journal of Solid-State Circuits, vol. 32, pp. 1876-1886, 1997.
    • (1997) IEEE Journal of Solid-State Circuits , vol.32 , pp. 1876-1886
    • Vorenkamp, P.1    Roovers, R.2
  • 73
    • 0032315981 scopus 로고    scopus 로고
    • A 400-Msample/s, 6-b CMOS folding and interpolating ADC
    • M. P. Flynn and B. Sheahan: A 400-Msample/s, 6-b CMOS folding and interpolating ADC, IEEE Journal of Solid-State Circuits, vol. 33, pp. 1932-1938, 1998.
    • (1998) IEEE Journal of Solid-State Circuits , vol.33 , pp. 1932-1938
    • Flynn, M.P.1    Sheahan, B.2
  • 74
    • 2442637540 scopus 로고    scopus 로고
    • A 1.8V1.6 GS/s 8 b self-calibrating folding ADC with 7.26 ENOB at Nyquist frequency
    • R. Taft, C. Menkus, M. R. Tursi, O. Hidri, and V. Pons: A 1.8V1.6 GS/s 8 b self-calibrating folding ADC with 7.26 ENOB at Nyquist frequency, ISSCC Dig. Tech. Papers, pp. 252-253, 2004.
    • (2004) ISSCC Dig. Tech. Papers , pp. 252-253
    • Taft, R.1    Menkus, C.2    Tursi, M.R.3    Hidri, O.4    Pons, V.5
  • 76
    • 0026240449 scopus 로고
    • Analysis of mismatch effects among A/D converters in a timeinterleaved waveform digitizer
    • A. Petraglia and S. K. Mitra: Analysis of mismatch effects among A/D converters in a timeinterleaved waveform digitizer, IEEE Transactions on Instrumentation and Measurement, vol. 40, pp. 831-835, 1991.
    • (1991) IEEE Transactions on Instrumentation and Measurement , vol.40 , pp. 831-835
    • Petraglia, A.1    Mitra, S.K.2
  • 79
    • 0022900276 scopus 로고
    • A 12-bit successive-approximation-type ADC with digital error correction
    • K. Bacrania: A 12-bit successive-approximation-type ADC with digital error correction, IEEE Journal of Solid-State Circuits, vol. 21, pp. 1016-1025, 1986.
    • (1986) IEEE Journal of Solid-State Circuits , vol.21 , pp. 1016-1025
    • Bacrania, K.1
  • 80
    • 0032715065 scopus 로고    scopus 로고
    • High resolution rail-to-rail ADC in CMOS digital technology
    • Gardino and F. Maloberti: High Resolution Rail-To-Rail ADC in CMOS Digital Technology, IEEE Proc. ISCAS 99, pp. II-339/II-342, 1999.
    • (1999) IEEE Proc. ISCAS 99
    • Gardino1    Maloberti, F.2
  • 81
    • 0035392548 scopus 로고    scopus 로고
    • 12-bit Low-power fully differential switched capacitor noncalibrating successive approximation ADC with 1 MS/s
    • G. Promitzer: 12-bit Low-power fully differential switched capacitor noncalibrating successive approximation ADC with 1 MS/s, IEEE Journal of Solid-State Circuits, vol. 36, pp. 1138-1143, 2001.
    • (2001) IEEE Journal of Solid-State Circuits , vol.36 , pp. 1138-1143
    • Promitzer, G.1
  • 82
    • 34548857452 scopus 로고    scopus 로고
    • A 25 μW 100kS/s ADC for wireless micro-sensor applications
    • N. Verma and A. P. Chandrakasan: A 25 μW 100kS/s ADC for Wireless Micro-Sensor Applications, IEEE Intern. Solid State Circ. Conf., Vol. 49, pp. 222-223, 2006.
    • (2006) IEEE Intern. Solid State Circ. Conf. , vol.49 , pp. 222-223
    • Verma, N.1    Chandrakasan, A.P.2
  • 83
    • 0023599417 scopus 로고
    • A pipelined 5-Msample/s 9-bit analog-to-digital converter
    • S. H. Lewis and P. R. Gray: A pipelined 5-Msample/s 9-bit analog-to-digital converter, IEEE Journal of Solid-State Circuits, vol. 22, pp. 954-961, 1987.
    • (1987) IEEE Journal of Solid-State Circuits , vol.22 , pp. 954-961
    • Lewis, S.H.1    Gray, P.R.2
  • 85
    • 0033872609 scopus 로고    scopus 로고
    • A 55-mW, 10-bit, 40-Msample/s Nyquist-rate CMOS ADC
    • March
    • I. Mehr and L. Singer: A 55-mW, 10-bit, 40-Msample/s Nyquist-rate CMOS ADC, IEEE Journal of Solid-State Circuits, vol. 35, pp. 318-325, March 2000.
    • (2000) IEEE Journal of Solid-State Circuits , vol.35 , pp. 318-325
    • Mehr, I.1    Singer, L.2
  • 87
    • 0021598441 scopus 로고
    • A ratio-independent algorithmic analog-to-digital conversion technique
    • P. Li, M. J. Chin, P. R. Gray, and R. Castello: A ratio-independent algorithmic analog-to-digital conversion technique, IEEE Journal of Solid-State Circuits, vol. 19, pp. 828-836, 1984
    • (1984) IEEE Journal of Solid-State Circuits , vol.19 , pp. 828-836
    • Li, P.1    Chin, M.J.2    Gray, P.R.3    Castello, R.4
  • 98
    • 0026138527 scopus 로고
    • A high-speed sample-and-hold technique using a miller hold capacitance
    • P. J. Lim and B. A. Wooley: A High-Speed Sample-and-Hold Technique Using a Miller Hold Capacitance, IEEE Journal of Solid-state Circuits, vol. 26, pp. 643-651, 1991.
    • (1991) IEEE Journal of Solid-state Circuits , vol.26 , pp. 643-651
    • Lim, P.J.1    Wooley, B.A.2
  • 100
    • 0021477881 scopus 로고
    • Switched induced error voltage on a swithced capacitor
    • B. J. Siew and C. Hu: Switched Induced Error Voltage on a Swithced Capacitor, IEEE Journal of Solid-state Circuits, vol. 19, pp. 519-525, 1984.
    • (1984) IEEE Journal of Solid-state Circuits , vol.19 , pp. 519-525
    • Siew, B.J.1    Hu, C.2
  • 101
    • 0022315467 scopus 로고
    • Measurement and modeling of charge feedthrough in N-channel MOS analog switches
    • W. B. Wilson, et al.: Measurement and Modeling of Charge Feedthrough in N-Channel MOS AnalogSwitches, IEEE J. Solid-StateCircuits, vol. SC-20, pp. 1206-1213, 1985.
    • (1985) IEEE J. Solid-State Circuits , vol.SC-20 , pp. 1206-1213
    • Wilson, W.B.1
  • 103
    • 0026136884 scopus 로고
    • Charge Injection in Analog CMOS Switches
    • C. Eichenberger and W. Guggernbuhl: Charge Injection in Analog CMOS Switches, IEEProceedings-G, vol. 138, pp. 155-159, 1991.
    • (1991) IEEProceedings-G , vol.138 , pp. 155-159
    • Eichenberger, C.1    Guggernbuhl, W.2
  • 105
    • 0031331885 scopus 로고    scopus 로고
    • A 1-V 1.8-MHz CMOS switched-opamp SC filter with rail-to-rail output swing
    • A. Baschirotto and R. Castello: A 1-V 1.8-MHz CMOS switched-opamp SC filter with rail-to-rail output swing, IEEE J. Solid-State Circuits, vol. 32, no. 12, pp. 1979-1986, 1997.
    • (1997) IEEE J. Solid-State Circuits , vol.32 , Issue.12 , pp. 1979-1986
    • Baschirotto, A.1    Castello, R.2
  • 107
    • 0032664038 scopus 로고    scopus 로고
    • A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter
    • A. M. Abo and P. R. Gray: A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter, IEEE J. Solid State Circuits, vol. 34, pp. 599-606, 1999.
    • (1999) IEEE J. Solid State Circuits , vol.34 , pp. 599-606
    • Abo, A.M.1    Gray, P.R.2
  • 108
    • 33746907111 scopus 로고    scopus 로고
    • Switch bootstrapping for precise sampling beyond supply voltage
    • D. Aksin, M. Al-Shyoukh, and F. Maloberti: Switch Bootstrapping for Precise Sampling Beyond Supply Voltage, IEEE J. Solid State Circuits, vol. 41, pp. 1938-1943, 2006.
    • (2006) IEEE J. Solid State Circuits , vol.41 , pp. 1938-1943
    • Aksin, D.1    Al-Shyoukh, M.2    Maloberti, F.3
  • 109
    • 0343496175 scopus 로고
    • An unusual electronic analog-digital conversion method
    • B. D. Smith: An unusual electronic analog-digital conversion method, IRE Transaction on Instrumentations, vol. 5, pp. 155-160, 1956.
    • (1956) IRE Transaction on Instrumentations , vol.5 , pp. 155-160
    • Smith, B.D.1
  • 111
    • 0032315981 scopus 로고    scopus 로고
    • A 400-Msample/s, 6-b CMOS folding and interpolating ADC
    • M. P. Flynn and B. Sheahan: A 400-Msample/s, 6-b CMOS folding and interpolating ADC, IEEE Journal of Solid-State Circuits, vol. 33, pp. 1932-1938, 1998.
    • (1998) IEEE Journal of Solid-State Circuits , vol.33 , pp. 1932-1938
    • Flynn, M.P.1    Sheahan, B.2
  • 112
    • 0035111817 scopus 로고    scopus 로고
    • All-MOS voltage-to-current converter
    • B. Fotouhi: All-MOS voltage-to-current converter, IEEE Journal of Solid-State Circuits, vol. 36, pp. 147-151, 2001.
    • (2001) IEEE Journal of Solid-State Circuits , vol.36 , pp. 147-151
    • Fotouhi, B.1
  • 114
    • 0030195073 scopus 로고    scopus 로고
    • CMOS low distortion high-frequency variable-gain amplifier
    • J. J. F. Rijns: CMOS low distortion high-frequency variable-gain amplifier, IEEE J. Solid-State Circuits, vol. 31, pp. 1029-1035, 1996.
    • (1996) IEEE J. Solid-State Circuits , vol.31 , pp. 1029-1035
    • Rijns, J.J.F.1
  • 119
    • 0015420117 scopus 로고
    • Differential PCM for speech and data signals
    • J. B. O'Neal and R. W. Stroh: Differential PCM for speech and data signals, IEEE Trans. on Communications, vol. COMM-20, pp. 900-912, 1972.
    • (1972) IEEE Trans. on Communications , vol.COMM-20 , pp. 900-912
    • O'Neal, J.B.1    Stroh, R.W.2
  • 120
    • 0019607802 scopus 로고
    • The structure of quantization noise from sigma-delta modulation
    • J. C. Candy and O. J. Benjamin: The Structure of Quantization Noise from Sigma-Delta Modulation, IEEE Trans. Communications, vol. COM-29, pp. 1316-1323, 1981.
    • (1981) IEEE Trans. Communications , vol.COM-29 , pp. 1316-1323
    • Candy, J.C.1    Benjamin, O.J.2
  • 121
    • 0022027157 scopus 로고
    • A use of double integration in sigma delta modulation
    • J. C. Candy: A Use of Double Integration in Sigma Delta Modulation, IEEE Trans. on Communications, vol. COM-33, pp. 249-258, 1985.
    • (1985) IEEE Trans. on Communications , vol.COM-33 , pp. 249-258
    • Candy, J.C.1
  • 123
    • 0023363236 scopus 로고
    • An analysis of nonlinear behavior in delta - Sigma modulators
    • S. H. Ardalan and J. J. Paulos: An analysis of nonlinear behavior in delta - sigma modulators, IEEE Trans. Circuit Syst., vol. CAS-34, pp. 593-603, 1987.
    • (1987) IEEE Trans. Circuit Syst. , vol.CAS-34 , pp. 593-603
    • Ardalan, S.H.1    Paulos, J.J.2
  • 124
    • 0024645821 scopus 로고
    • A 14-bit 80-kHz sigma-delta A/D converter: Modeling, design and performance evaluation
    • S. R. Norsworthy, I. G. Post, and H. S. Fetterman: A 14-bit 80-kHz sigma-delta A/D converter: Modeling, design and performance evaluation, IEEE Journal of Solid-State Circuits, vol. 24, pp. 256-266, 1989.
    • (1989) IEEE Journal of Solid-State Circuits , vol.24 , pp. 256-266
    • Norsworthy, S.R.1    Post, I.G.2    Fetterman, H.S.3
  • 125
    • 0024733009 scopus 로고
    • Quantization noise in single-loop sigma-delta modulation with sinusoidal inputs
    • R. M. Gray, W. Chou, and P. W. Wong: Quantization Noise in Single-Loop Sigma-Delta Modulation with Sinusoidal Inputs, IEEE Trans. Communications, vol. COM-37, pp. 956-968, 1989.
    • (1989) IEEE Trans. Communications , vol.COM-37 , pp. 956-968
    • Gray, R.M.1    Chou, W.2    Wong, P.W.3
  • 126
    • 0024681085 scopus 로고
    • Spectral analysis of quantization noise in a single-loop sigma-delta modulator with dc input
    • R. M. Gray: Spectral Analysis of Quantization Noise in a Single-Loop Sigma-Delta Modulator with dc Input, IEEE Trans. Communications, vol. COM-37, pp. 588-599, 1989.
    • (1989) IEEE Trans. Communications , vol.COM-37 , pp. 588-599
    • Gray, R.M.1
  • 127
    • 0026136643 scopus 로고
    • Second-order sigma-delta modulation for digitalaudio signal acquisition
    • B. P. Brandt, D. E. Wingard, and B. A. Wooley: Second-order sigma-delta modulation for digitalaudio signal acquisition, IEEE Journal of Solid-State Circuits, vol. 26, pp. 618-627, 1991.
    • (1991) IEEE Journal of Solid-State Circuits , vol.26 , pp. 618-627
    • Brandt, B.P.1    Wingard, D.E.2    Wooley, B.A.3
  • 128
    • 0024124005 scopus 로고
    • The design of sigma-delta modulation analog-to-digital converters
    • B. E. Boser and B. A. Wooley: The design of sigma-delta modulation analog-to-digital converters, IEEE Journal of Solid-State Circuits, vol. 23, pp. 1298-1308, 1988.
    • (1988) IEEE Journal of Solid-State Circuits , vol.23 , pp. 1298-1308
    • Boser, B.E.1    Wooley, B.A.2
  • 129
    • 0035821957 scopus 로고    scopus 로고
    • Wideband low-distortion delta-sigma ADC topology
    • J. Silva, U. Moon, J. Steensgaard, and G. Temes: Wideband low-distortion delta-sigma ADC topology, Electron. Lett., vol. 37, pp. 737-738, 2001.
    • (2001) Electron. Lett. , vol.37 , pp. 737-738
    • Silva, J.1    Moon, U.2    Steensgaard, J.3    Temes, G.4
  • 130
    • 4644302408 scopus 로고    scopus 로고
    • High-order multibit modulators and pseudo data-weightedaveraging in low-oversampling ΣΔ ADC's for broadband applications
    • A. A. Hamoui and K. W. Martin: High-order multibit modulators and pseudo data-weightedaveraging in low-oversampling ΣΔ ADC's for broadband applications, IEEE Transaction on Circuits Syst. I, vol. 51, pp. 72-85, 2004.
    • (2004) IEEE Transaction on Circuits Syst. I , vol.51 , pp. 72-85
    • Hamoui, A.A.1    Martin, K.W.2
  • 131
    • 25144499991 scopus 로고    scopus 로고
    • A low-voltage low-power sigma-delta modulator for broadband analog-to-digital conversion
    • K. Nam, S. Lee, D. K. Su, and B. A. Wooley: A low-voltage low-power sigma-delta modulator for broadband analog-to-digital conversion, IEEE Journal of Solid-State Circuits, vol. 40, pp. 1855-1864, 2005.
    • (2005) IEEE Journal of Solid-State Circuits , vol.40 , pp. 1855-1864
    • Nam, K.1    Lee, S.2    Su, D.K.3    Wooley, B.A.4
  • 132
    • 78650273796 scopus 로고
    • Dither signals and their effect on quantization noise
    • L. Schuchman: Dither signals and their effect on quantization noise, IEEE Trans. Communications Tech., vol. COMM-12, pp. 162-165, 1964.
    • (1964) IEEE Trans. Communications Tech. , vol.COMM-12 , pp. 162-165
    • Schuchman, L.1
  • 133
    • 0023346287 scopus 로고
    • Switched-capacitor circuits with reduced sensitivity to amplifier gain
    • K. Nagaraj, T. R. Viswanathan, K. Singhal, and J. Vlach: Switched-capacitor circuits with reduced sensitivity to amplifier gain, IEEE Trans. Circuit Syst., vol. CAS-34, pp. 571-574, 1987.
    • (1987) IEEE Trans. Circuit Syst. , vol.CAS-34 , pp. 571-574
    • Nagaraj, K.1    Viswanathan, T.R.2    Singhal, K.3    Vlach, J.4
  • 135
    • 0027607271 scopus 로고
    • A switched-capacitor delta-sigma modulator with reduced sensitivity to op-amp gain
    • P. J. Hurst, R. A. Levinson, and D. J. Block: A switched-capacitor delta-sigma modulator with reduced sensitivity to op-amp gain, IEEE Journal of Solid-State Circuits, vol. 28, pp. 691-696, 1993.
    • (1993) IEEE Journal of Solid-State Circuits , vol.28 , pp. 691-696
    • Hurst, P.J.1    Levinson, R.A.2    Block, D.J.3
  • 137
    • 0029544837 scopus 로고
    • A 22-kHz multibit switched-capacitor sigmadelta D/A converter with 92 dB dynamic range
    • P. Ju, K. Suyama, P. F. Ferguson Jr., and W. Lee: A 22-kHz multibit switched-capacitor sigmadelta D/A converter with 92 dB dynamic range, IEEE Journal of Solid-State Circuits, vol. 30, pp. 1316-1325, 1995.
    • (1995) IEEE Journal of Solid-State Circuits , vol.30 , pp. 1316-1325
    • Ju, P.1    Suyama, K.2    Ferguson Jr., P.F.3    Lee, W.4
  • 138
    • 0031192291 scopus 로고    scopus 로고
    • A 1.5-V-100-μWΣΔ modulator with 12-b dynamic range using the switched-opamp technique
    • July
    • V. Peluso, M. S. J. Steyaert, and W. Sansen: A 1.5-V-100- μWΣΔ modulator with 12-b dynamic range using the switched-opamp technique, IEEE Journal of Solid-State Circuits, vol. 32, pp. 943-952, July 1997.
    • (1997) IEEE Journal of Solid-State Circuits , vol.32 , pp. 943-952
    • Peluso, V.1    Steyaert, M.S.J.2    Sansen, W.3
  • 142
    • 0025642249 scopus 로고
    • An improved sigma-delta modulator architecture
    • May
    • T. Leslie and B. Singh: An improved sigma-delta modulator architecture, Proc. IEEE ICASSP, pp. 372-375, May 1990.
    • (1990) Proc. IEEE ICASSP , pp. 372-375
    • Leslie, T.1    Singh, B.2
  • 144
    • 29044446154 scopus 로고    scopus 로고
    • A low-power multi-bit ΣΔ modulator in 90-nm digital CMOS without DEM
    • J. Yu and F. Maloberti: A low-power multi-bit ΣΔ modulator in 90-nm digital CMOS without DEM, IEEE Journal of Solid-State Circuits, vol. 40, pp. 2428-2436, 2005.
    • (2005) IEEE Journal of Solid-State Circuits , vol.40 , pp. 2428-2436
    • Yu, J.1    Maloberti, F.2
  • 145
    • 0024716952 scopus 로고
    • A 17-bit oversampling D-to-A conversion technology using multistage noise shaping
    • Y. Matsuya, K. Uchimura, A. Iwata, and T. Kaneko: A 17-bit oversampling D-to-A conversion technology using multistage noise shaping, IEEE Journal of Solid-State Circuits, vol. 24, pp. 969-975, 1989.
    • (1989) IEEE Journal of Solid-State Circuits , vol.24 , pp. 969-975
    • Matsuya, Y.1    Uchimura, K.2    Iwata, A.3    Kaneko, T.4
  • 150
    • 0028388460 scopus 로고
    • A third-order sigma-delta modulator with extended dynamic range
    • L. A. Williams III and B. A. Wooley: A third-order sigma-delta modulator with extended dynamic range, IEEE Journal of Solid-State Circuits, vol. 29, pp. 193-202, 1994.
    • (1994) IEEE Journal of Solid-State Circuits , vol.29 , pp. 193-202
    • Williams III, L.A.1    Wooley, B.A.2
  • 151
    • 0029510571 scopus 로고
    • A fourth-order bandpass delta-sigma modulator with reduced number of op amps
    • B.-S. Song: A fourth-order bandpass delta-sigma modulator with reduced number of op amps, IEEE Journal of Solid-State Circuits, vol. 30, pp. 1309-1315, 1995.
    • (1995) IEEE Journal of Solid-State Circuits , vol.30 , pp. 1309-1315
    • Song, B.-S.1
  • 152
    • 0036503172 scopus 로고    scopus 로고
    • A 12-mW ADC deltasigma modulator with 80 dB of dynamic range integrated in a single-chip Bluetooth transceiver
    • J. Grilo, I. Galton, K. Wang, and R. G. Montemayor: A 12-mW ADC deltasigma modulator with 80 dB of dynamic range integrated in a single-chip Bluetooth transceiver, IEEE Journal of Solid-State Circuits, vol. 37, pp. 271-278, 2002.
    • (2002) IEEE Journal of Solid-State Circuits , vol.37 , pp. 271-278
    • Grilo, J.1    Galton, I.2    Wang, K.3    Montemayor, R.G.4
  • 154
    • 10444264522 scopus 로고    scopus 로고
    • A cascaded continuous-time ΣΔ modulator with 67-dB dynamic range in 10-MHz bandwidth
    • L. J. Breems, R. Rutten, and G. Wetzker: A cascaded continuous-time ΣΔ modulator with 67-dB dynamic range in 10-MHz bandwidth, IEEE Journal of Solid-State Circuits, vol. 39, pp. 2152-2160, 2004.
    • (2004) IEEE Journal of Solid-State Circuits , vol.39 , pp. 2152-2160
    • Breems, L.J.1    Rutten, R.2    Wetzker, G.3
  • 155
    • 23744468047 scopus 로고    scopus 로고
    • A fourth-order ΣΔ interface for micromachined inertial sensors
    • V. P. Petkov and B. E. Boser: A fourth-order ΣΔ interface for micromachined inertial sensors, IEEE Journal of Solid-State Circuits, vol. 40, pp. 1602-1609, 2005.
    • (2005) IEEE Journal of Solid-State Circuits , vol.40 , pp. 1602-1609
    • Petkov, V.P.1    Boser, B.E.2
  • 156
    • 27844585171 scopus 로고    scopus 로고
    • A CMOS 110-dB at 40-kS/s programmable-gain chopper-stabilized third-order 2-1 cascade sigma-delta modulator for low-power high-linearity automotive sensor ASICs
    • J. M. De La Rosa, S. Escalera, B. Perez-Verdu, F. Medeiro, O. Guerra, R. Del Rio, and A. Rodriguez-Vazquez: A CMOS 110-dB at 40-kS/s programmable-gain chopper-stabilized third-order 2-1 cascade sigma-delta modulator for low-power high-linearity automotive sensor ASICs, IEEE Journal of Solid-State Circuits, vol. 40, pp. 2246-2264, 2005.
    • (2005) IEEE Journal of Solid-State Circuits , vol.40 , pp. 2246-2264
    • De La Rosa, J.M.1    Escalera, S.2    Perez-Verdu, B.3    Medeiro, F.4    Guerra, O.5    Del Rio, R.6    Rodriguez-Vazquez, A.7
  • 157
    • 0032662666 scopus 로고    scopus 로고
    • Excess loop delay in continuous-time deltasigma modulators
    • J. A. Cherry and W. M. Snelgrove: Excess loop delay in continuous-time deltasigma modulators, IEEE Trans. Circuits and Systems-II, vol. 46, pp. 376-389, 1999.
    • (1999) IEEE Trans. Circuits and Systems-II , vol.46 , pp. 376-389
    • Cherry, J.A.1    Snelgrove, W.M.2
  • 158
    • 0033149028 scopus 로고    scopus 로고
    • Clock jitter and quantizer metastability in continuous-time delta-sigma modulators
    • J. A. Cherry and W. M. Snelgrove: Clock jitter and quantizer metastability in continuous-time delta-sigma modulators, IEEE Trans. Circuits and Systems-II, vol. 46, pp. 661-676, 1999.
    • (1999) IEEE Trans. Circuits and Systems-II , vol.46 , pp. 661-676
    • Cherry, J.A.1    Snelgrove, W.M.2
  • 160
    • 0346342400 scopus 로고    scopus 로고
    • A triple-mode continuous-time ΣΔ modulator with switched-capacitor feedback DAC for a GSM-EDGE/CDMA2000/UMTS receiver
    • R. H. M. Van Veldhoven: A triple-mode continuous-time ΣΔ modulator with switched-capacitor feedback DAC for a GSM-EDGE/CDMA2000/UMTS receiver, IEEE Journal of Solid-State Circuits, vol. 38, pp. 2069-2076, 2003.
    • (2003) IEEE Journal of Solid-State Circuits , vol.38 , pp. 2069-2076
    • Van Veldhoven, R.H.M.1
  • 161
    • 0042697093 scopus 로고    scopus 로고
    • A 1.5-V 12-bit power-efficient continuous-time thirdorder sigma-delta modulator
    • August
    • F. Gerfers, M. Ortmanns, and Y. Manoli: A 1.5-V 12-bit power-efficient continuous-time thirdorder sigma-delta modulator, IEEE Journal of Solid-State Circuits, vol. 38, pp. 1343-1352, August 2003.
    • (2003) IEEE Journal of Solid-State Circuits , vol.38 , pp. 1343-1352
    • Gerfers, F.1    Ortmanns, M.2    Manoli, Y.3
  • 167
  • 168
    • 0029510571 scopus 로고
    • A fourth-order bandpass delta-sigma modulator with reduced numbers of op amps
    • Bang-SupSong: A fourth-order bandpass delta-sigma modulator with reduced numbers of op amps, IEEE Journal of Solid-State Circuits, vol. 30, pp. 1309-1315, 1995.
    • (1995) IEEE Journal of Solid-State Circuits , vol.30 , pp. 1309-1315
    • Song, B.-S.1
  • 169
    • 0034228633 scopus 로고    scopus 로고
    • A 200-MHz IF 11-bit fourth-order bandpass ΣΔ ADC in SiGe
    • R. Maurino and P. Mole: A 200-MHz IF 11-bit fourth-order bandpass ΣΔ ADC in SiGe, IEEE Journal of Solid-State Circuits, vol. 35, pp. 959-967, 2000.
    • (2000) IEEE Journal of Solid-State Circuits , vol.35 , pp. 959-967
    • Maurino, R.1    Mole, P.2
  • 171
    • 3843052433 scopus 로고    scopus 로고
    • A 10.7-MHz self-calibrated switchedcapacitor-based multibit second-order bandpass ΣΔ modulator with on-chip switched buffer
    • V. Colonna, G. Gandolfi, F. Stefani, and A. Baschirotto: A 10.7-MHz self-calibrated switchedcapacitor-based multibit second-order bandpass ΣΔ modulator with on-chip switched buffer, IEEE Journal of Solid-State Circuits, vol. 39, pp. 1341-1346, 2004.
    • (2004) IEEE Journal of Solid-State Circuits , vol.39 , pp. 1341-1346
    • Colonna, V.1    Gandolfi, G.2    Stefani, F.3    Baschirotto, A.4
  • 172
    • 2442651375 scopus 로고    scopus 로고
    • A mirror image free two-path bandpass ΣΔ modulator with 72dB SNR and 86dB SFDR
    • F. Ying and F. Maloberti: A mirror image free two-path bandpass ΣΔ modulator with 72dB SNR and 86dB SFDR, IEEE International Solid-State Circuits Conference, vol. XVII, pp. 84-85, 2004.
    • (2004) IEEE International Solid-State Circuits Conference , vol.17 , pp. 84-85
    • Ying, F.1    Maloberti, F.2
  • 173
    • 0028418295 scopus 로고
    • A stereo asynchronous digital sample-rate converter for digital audio
    • R. Adams and T. Kwan: A stereo asynchronous digital sample-rate converter for digital audio, IEEE Journal of Solid-State Circuits, vol. 29, pp. 481-488, 1994.
    • (1994) IEEE Journal of Solid-State Circuits , vol.29 , pp. 481-488
    • Adams, R.1    Kwan, T.2
  • 174
    • 0029544837 scopus 로고
    • A 22-kHz multibit switched-capacitor sigmadelta D/A converter with 92 dB dynamic range
    • P. Ju, K. Suyama, P. F. Ferguson Jr., and Wai Lee: A 22-kHz multibit switched-capacitor sigmadelta D/A converter with 92 dB dynamic range, IEEE Journal of Solid-State Circuits, vol. 30, pp. 1316-1325, 1995.
    • (1995) IEEE Journal of Solid-State Circuits , vol.30 , pp. 1316-1325
    • Ju, P.1    Suyama, K.2    Ferguson Jr., P.F.3    Lee, W.4
  • 175
    • 0030402994 scopus 로고    scopus 로고
    • A stereo multibit ΣΔ DAC with asynchronous master-clock interface
    • T. Kwan, R. Adams, and R. Libert: A stereo multibit ΣΔ DAC with asynchronous master-clock interface, IEEE Journal of Solid-State Circuits, vol. 31, pp. 1881-1887, 1996.
    • (1996) IEEE Journal of Solid-State Circuits , vol.31 , pp. 1881-1887
    • Kwan, T.1    Adams, R.2    Libert, R.3
  • 176
    • 0031169153 scopus 로고    scopus 로고
    • A 1.8-V digital-audio sigma-delta modulator in 0.8-μm CMOS
    • S. Rabii and B. A. Wooley: A 1.8-V digital-audio sigma-delta modulator in 0.8-μm CMOS, IEEE Journal of Solid-State Circuits, vol. 32, pp. 783-796, 1997.
    • (1997) IEEE Journal of Solid-State Circuits , vol.32 , pp. 783-796
    • Rabii, S.1    Wooley, B.A.2
  • 178
    • 0032309122 scopus 로고    scopus 로고
    • A 1.5 V, 4.1 mW dual-channel audio delta-sigma D/A converter
    • I. Fujimori and T. Sugimoto: A 1.5 V, 4.1 mW dual-channel audio delta-sigma D/A converter, IEEE Journal of Solid-State Circuits, vol. 33, pp. 1863-1870, 1998.
    • (1998) IEEE Journal of Solid-State Circuits , vol.33 , pp. 1863-1870
    • Fujimori, I.1    Sugimoto, T.2
  • 179
    • 0032308948 scopus 로고    scopus 로고
    • A 113-dB SNR oversampling DAC with segmented noise-shaped scrambling
    • R. Adams, K. Q. Nguyen, and K. Sweetland: A 113-dB SNR oversampling DAC with segmented noise-shaped scrambling, IEEE Journal of Solid-State Circuits, vol. 33, pp. 1871-1878, 1998.
    • (1998) IEEE Journal of Solid-State Circuits , vol.33 , pp. 1871-1878
    • Adams, R.1    Nguyen, K.Q.2    Sweetland, K.3
  • 184
    • 0021598441 scopus 로고
    • A ratio-independent algorithmic analog-to-digital conversion technique
    • P. Li, M. J. Chin, P. R. Gray, and R. Castello: A ratio-independent algorithmic analog-to-digital conversion technique, IEEE Journal of Solid-State Circuits, vol. 19, pp. 828-836, 1984.
    • (1984) IEEE Journal of Solid-State Circuits , vol.19 , pp. 828-836
    • Li, P.1    Chin, M.J.2    Gray, P.R.3    Castello, R.4
  • 185
    • 0022769699 scopus 로고
    • Reference refreshing cyclic analog-to-digital and digital-to-analog converters
    • C. Shih and P. R. Gray: Reference refreshing cyclic analog-to-digital and digital-to-analog converters, IEEE Journal of Solid-State Circuits, vol. 21, pp. 544-554, 1986.
    • (1986) IEEE Journal of Solid-State Circuits , vol.21 , pp. 544-554
    • Shih, C.1    Gray, P.R.2
  • 189
    • 0028417146 scopus 로고
    • A 12-b 600 ks/s digitally self-calibrated pipelined algorithmic ADC
    • H. Lee: A 12-b 600 ks/s digitally self-calibrated pipelined algorithmic ADC, IEEE Journal of Solid-State Circuits, vol. 29, pp. 509-515, 1994.
    • (1994) IEEE Journal of Solid-State Circuits , vol.29 , pp. 509-515
    • Lee, H.1
  • 190
    • 0032316909 scopus 로고    scopus 로고
    • A continuously calibrated 12-b, 10-MS/s, 3.3-V A/D converter
    • J. M. Ingino and B. A. Wooley: A continuously calibrated 12-b, 10-MS/s, 3.3-V A/D converter, IEEE Journal of Solid-State Circuits, vol. 33, pp. 1920-1931, 1998.
    • (1998) IEEE Journal of Solid-State Circuits , vol.33 , pp. 1920-1931
    • Ingino, J.M.1    Wooley, B.A.2
  • 191
    • 0033872609 scopus 로고    scopus 로고
    • A 55-mW, 10-bit, 40-Msample/s Nyquist-rate CMOS ADC
    • I. Mehr and L. Singer: A 55-mW, 10-bit, 40-Msample/s Nyquist-rate CMOS ADC, IEEE Journal of Solid-State Circuits, vol. 35, pp. 318-325, 2000.
    • (2000) IEEE Journal of Solid-State Circuits , vol.35 , pp. 318-325
    • Mehr, I.1    Singer, L.2
  • 192
    • 0038380412 scopus 로고    scopus 로고
    • Digital background calibration of an algorithmic analog-to-digital converter using a simplified queue
    • E. B. Blecker, T. M. McDonald, O. E. Erdogan, P. J. Hurst, and S. H. Lewis: Digital background calibration of an algorithmic analog-to-digital converter using a simplified queue, IEEE Journal of Solid-State Circuits, vol. 38, pp. 1059-1062, 2003.
    • (2003) IEEE Journal of Solid-State Circuits , vol.38 , pp. 1059-1062
    • Blecker, E.B.1    McDonald, T.M.2    Erdogan, O.E.3    Hurst, P.J.4    Lewis, S.H.5
  • 193
    • 18444378113 scopus 로고    scopus 로고
    • A 12-bit 80-Msample/s pipelined ADC with bootstrapped digital calibration
    • C. R. Grace, P. J. Hurst, and S. H. Lewis: A 12-bit 80-Msample/s pipelined ADC with bootstrapped digital calibration, IEEE Journal of Solid-State Circuits, vol. 40, pp. 1038-1046, 2005.
    • (2005) IEEE Journal of Solid-State Circuits , vol.40 , pp. 1038-1046
    • Grace, C.R.1    Hurst, P.J.2    Lewis, S.H.3
  • 195
    • 0032313025 scopus 로고    scopus 로고
    • A digital background calibration technique for time-interleaved analog-to-digital converters
    • D. Fu, K. C. Dyer, S. H. Lewis, and P. J. Hurst: A digital background calibration technique for time-interleaved analog-to-digital converters, IEEE Journal of Solid-State Circuits, vol. 33, pp. 1904-1911 1998.
    • (1998) IEEE Journal of Solid-State Circuits , vol.33 , pp. 1904-1911
    • Fu, D.1    Dyer, K.C.2    Lewis, S.H.3    Hurst, P.J.4
  • 196
    • 0032308947 scopus 로고    scopus 로고
    • An analog background calibration technique for time-interleaved analog-to-digital converters
    • K. C. Dyer, D. Fu, S. H. Lewis, and P. J. Hurst: An analog background calibration technique for time-interleaved analog-to-digital converters, IEEE Journal of Solid-State Circuits, vol. 33, pp. 1912-1919, 1998.
    • (1998) IEEE Journal of Solid-State Circuits , vol.33 , pp. 1912-1919
    • Dyer, K.C.1    Fu, D.2    Lewis, S.H.3    Hurst, P.J.4
  • 197
    • 0031630107 scopus 로고    scopus 로고
    • Improving the linearity in high-speed analog-to digital converters
    • U. Gatti, G. Gazzoli and F. Maloberti: Improving the Linearity in High-Speed Analog-to Digital Converters, Proceedings IEEE Int. Simp. on CAS, vol. 1, pp. 17-20, 1998.
    • (1998) Proceedings IEEE Int. Simp. on CAS , vol.1 , pp. 17-20
    • Gatti, U.1    Gazzoli, G.2    Maloberti, F.3
  • 198
    • 18544399632 scopus 로고    scopus 로고
    • A 12-b digital-background-calibrated algorithmic ADC with -90-dB THD
    • O. E. Erdogan, P. J. Hurst, and S. H. Lewis: A 12-b digital-background- calibrated algorithmic ADC with -90-dB THD, IEEE Journal of Solid-State Circuits, vol. 34, pp. 1812-1820, 1999.
    • (1999) IEEE Journal of Solid-State Circuits , vol.34 , pp. 1812-1820
    • Erdogan, O.E.1    Hurst, P.J.2    Lewis, S.H.3
  • 200
    • 0017269964 scopus 로고
    • Dynamic element matching for high accuracy monolithic D/A converters
    • R. J. Van De Plassche: Dynamic element matching for high accuracy monolithic D/A converters, IEEE J. Solid-State Circuits, vol. SC-11, pp. 795-800, 1976.
    • (1976) IEEE J. Solid-State Circuits , vol.SC-11 , pp. 795-800
    • Van De Plassche, R.J.1
  • 201
    • 0024645333 scopus 로고
    • A noise-shaping coder topology for 15+ bit converters
    • L. R. Carley: A noise-shaping coder topology for 15+ bit converters, IEEE Journal of Solid-State Circuits, vol. 24, pp. 267-273, 1989.
    • (1989) IEEE Journal of Solid-State Circuits , vol.24 , pp. 267-273
    • Carley, L.R.1
  • 203
    • 0026678367 scopus 로고
    • Multibit Sigma-Delta A/D converter incorporating a novel class of dynamic element matching techniques
    • B. H. Leung and Sehat Sutarja: Multibit Sigma-Delta A/D converter incorporating a novel class of dynamic element matching techniques, IEEE Trans. Circuit Syst. II, vol. CAS-39, pp. 35-51, 1992.
    • (1992) IEEE Trans. Circuit Syst. II , vol.CAS-39 , pp. 35-51
    • Leung, B.H.1    Sutarja, S.2
  • 204
    • 0029291106 scopus 로고
    • A high resolution multibit sigma-delta modulator with individual level averaging
    • F. Chen and B. H. Leung: A high resolution multibit sigma-delta modulator with individual level averaging, IEEE Journal of Solid-State Circuits, vol. 30, pp. 453-460, 1995
    • (1995) IEEE Journal of Solid-State Circuits , vol.30 , pp. 453-460
    • Chen, F.1    Leung, B.H.2
  • 205
    • 0029532111 scopus 로고
    • Linearity enhancement of multibit A/D and D/A converters using data weighted averaging
    • R. T. Baird and T. S. Fiez: Linearity enhancement of multibit A/D and D/A converters using data weighted averaging, IEEE Trans. Circuits Syst. II, vol. 42, pp. 753-762, 1995.
    • (1995) IEEE Trans. Circuits Syst. II , vol.42 , pp. 753-762
    • Baird, R.T.1    Fiez, T.S.2
  • 206
    • 0033886802 scopus 로고    scopus 로고
    • A 3.3-V single-poly CMOS audio ADC deltasigmamodulatorwith 98-dBpeakSINADand105-dB peakSFDR
    • E. Fogleman, I. Galton, W. Huff, and H. Jensen: A 3.3-V single-poly CMOS audio ADC deltasigmamodulatorwith 98-dBpeakSINADand105-dB peakSFDR, IEEE Journal of Solid-State Circuits, vol. 35, pp. 297-307, 2000.
    • (2000) IEEE Journal of Solid-State Circuits , vol.35 , pp. 297-307
    • Fogleman, E.1    Galton, I.2    Huff, W.3    Jensen, H.4
  • 207
    • 0035275406 scopus 로고    scopus 로고
    • An audio ADC Delta-Sigma modulator with 100-dB peak SINAD and 102-dB DR using a second-order mismatch-shaping DAC
    • E. Fogleman, J. Welz, and I. Galton: An audio ADC Delta-Sigma modulator with 100-dB peak SINAD and 102-dB DR using a second-order mismatch-shaping DAC, IEEE Journal of Solid-State Circuits, vol. 36, pp. 339-348, 2001.
    • (2001) IEEE Journal of Solid-State Circuits , vol.36 , pp. 339-348
    • Fogleman, E.1    Welz, J.2    Galton, I.3
  • 208
    • 0035693267 scopus 로고    scopus 로고
    • A 2.5-V Sigma-Delta modulator for broadband communications applications
    • K. Vleugels, S. Rabii, and B. A. Wooley: A 2.5-V Sigma-Delta modulator for broadband communications applications, IEEE J. of Solid-State Circuits, vol. 36, pp. 1887-1899, 2001.
    • (2001) IEEE J. of Solid-State Circuits , vol.36 , pp. 1887-1899
    • Vleugels, K.1    Rabii, S.2    Wooley, B.A.3
  • 209
    • 0019558332 scopus 로고
    • An economical class of digital filters for decimation and interpolation
    • E. Hogenauer: An economical class of digital filters for decimation and interpolation, IEEE Trans. Acoustics, Speech, and Signal Processing, vol. 29, pp. 155-162, 1981.
    • (1981) IEEE Trans. Acoustics, Speech, and Signal Processing , vol.29 , pp. 155-162
    • Hogenauer, E.1
  • 210
    • 0022473396 scopus 로고
    • Decimation for sigma delta modulation
    • J. C. Candy: Decimation for Sigma Delta Modulation, IEEE Trans. Communications, vol. COM-34, pp. 72-76, 1986.
    • (1986) IEEE Trans. Communications , vol.COM-34 , pp. 72-76
    • Candy, J.C.1
  • 212
    • 0028449675 scopus 로고
    • A low-power, area-efficient digital filter for decimation and interpolation
    • B. P. Brandt and B. A. Wooley: A Low-Power, Area-Efficient Digital Filter for Decimation and Interpolation, IEEE Journal of Solid State Circuits, vol. 29, pp. 679-687, 1994.
    • (1994) IEEE Journal of Solid State Circuits , vol.29 , pp. 679-687
    • Brandt, B.P.1    Wooley, B.A.2
  • 214
    • 0033888791 scopus 로고    scopus 로고
    • A stereo audio chip using approximate processing for decimation and interpolation filters
    • C. J. Pan: A stereo audio chip using approximate processing for decimation and interpolation filters, IEEE Journal of Solid-State Circuits, vol. 35, pp. 45-55, 2000.
    • (2000) IEEE Journal of Solid-State Circuits , vol.35 , pp. 45-55
    • Pan, C.J.1
  • 215
    • 1242263410 scopus 로고    scopus 로고
    • A micropower programmable DSP using approximate signal processing based on distributed arithmetic
    • R. Amirtharajah and A. P. Chandrakasan: A micropower programmable DSP using approximate signal processing based on distributed arithmetic, IEEE Journal of Solid-State Circuits, vol. 39, pp. 337-347, 2004.
    • (2004) IEEE Journal of Solid-State Circuits , vol.39 , pp. 337-347
    • Amirtharajah, R.1    Chandrakasan, A.P.2
  • 216
    • 0004021973 scopus 로고
    • Tutorial dsp-based testing of analog and mixed-signal circuits
    • IEEE, Washington D. C.
    • M. Mahoney: Tutorial DSP-Based Testing of Analog and Mixed-Signal Circuits, Computer Society, IEEE, Washington D. C., 1987.
    • (1987) Computer Society
    • Mahoney, M.1
  • 221
    • 5044241399 scopus 로고    scopus 로고
    • Analogue and mixed-signal test for systems on chip, special session introduction
    • Y. Sun: Analogue and mixed-signal test for systems on chip, Special Session Introduction, IEE Proceedings, Part G, vol. 151, pp 335-336, 2004.
    • (2004) IEE Proceedings, Part G , vol.151 , pp. 335-336
    • Sun, Y.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.