A 400-Msample/s, 6-b CMOS folding and interpolating ADC

IEEE Journal of Solid-State Circuits

Volumn 33, Issue 12, 1998, Pages 1932-1938

  Flynn, Michael P ^{a,b,c,d,e,f,g,h}   Sheahan, Ben ^a,b,d,i,j  

^a IEEE   (Ireland)

^b TEXAS INSTRUMENTS   (United States)

^c Silicon and Software Systems   (Ireland)

^d Texas Instruments ^*

^e UNIVERSITY COLLEGE CORK   (Ireland)

^f CARNEGIE MELLON UNIVERSITY   (United States)

^g UNIVERSITY COLLEGE CORK   (Ireland)

^h NATIONAL SEMICONDUCTOR CORPORATION   (United States)

ⁱ UNIVERSITY OF LIMERICK   (Ireland)

^j National Semiconductor   (United Kingdom)

more..

Author keywords

Analog to digital conversion; CMOS; Folding

Indexed keywords

AMPLIFIERS (ELECTRONIC); ANALOG TO DIGITAL CONVERSION; CMOS INTEGRATED CIRCUITS; COMPARATOR CIRCUITS;

ANALOG TO DIGITAL CONVERTER; FOLDING;

ELECTRIC CONVERTERS;

EID: 0032315981     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.735533     Document Type: Article

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