-
1
-
-
0031193193
-
Specifying communication DAC's
-
July
-
P. Hendriks, "Specifying communication DAC's" IEEE Spectrum, pp. 58-69, July 1997.
-
(1997)
IEEE Spectrum
, pp. 58-69
-
-
Hendriks, P.1
-
2
-
-
1542530626
-
A look at high-speed DAC performance for communications
-
Mar. 3
-
P. McGoldrick, "A look at high-speed DAC performance for communications," Electron. Design, pp. 87-95, Mar. 3, 1997.
-
(1997)
Electron. Design
, pp. 87-95
-
-
McGoldrick, P.1
-
3
-
-
0025538336
-
A 10-b 50-MHz CMOS D/A converter with 75-Ω buffer
-
Dec.
-
M. Pelgrom, "A 10-b 50-MHz CMOS D/A converter with 75-Ω buffer," IEEE J. Solid-State Circuits, vol. 25, no. 6, pp. 1347-1352, Dec. 1990.
-
(1990)
IEEE J. Solid-State Circuits
, vol.25
, Issue.6
, pp. 1347-1352
-
-
Pelgrom, M.1
-
5
-
-
0026190361
-
A 10-b 40-MHz 0.8-μm CMOS current-output D/A converter
-
July
-
C. Bastiaansen, D. Groeneveld, H. Schaouwenaars, and a Termeer, "A 10-b 40-MHz 0.8-μm CMOS current-output D/A converter," IEEE J. Solid-State Circuits, vol. 26, no. 7, pp. 917-921, July 1991.
-
(1991)
IEEE J. Solid-State Circuits
, vol.26
, Issue.7
, pp. 917-921
-
-
Bastiaansen, C.1
Groeneveld, D.2
Schaouwenaars, H.3
Termeer, A.4
-
6
-
-
0028542340
-
A 10-b 125 MHz CMOS digital-to-analog converter (DAC) with threshold-voltage compensated current sources
-
Nov.
-
S. Chin and C. Wu. "A 10-b 125 MHz CMOS digital-to-analog converter (DAC) with threshold-voltage compensated current sources," IEEE J. Solid-State Circuits, vol. 29, no. 11, pp. 1374-1380, Nov. 1994.
-
(1994)
IEEE J. Solid-State Circuits
, vol.29
, Issue.11
, pp. 1374-1380
-
-
Chin, S.1
Wu, C.2
-
7
-
-
0024122158
-
A low-power stereo 16-bit CMOS D/A converter for digital audio
-
Dec.
-
H. Schouwenaars, D. Groeneveld, and H. Termeer, "A low-power stereo 16-bit CMOS D/A converter for digital audio," IEEE J. Solid-State Circuits, vol. 23, no. 6, pp. 1290-1297, Dec. 1988.
-
(1988)
IEEE J. Solid-State Circuits
, vol.23
, Issue.6
, pp. 1290-1297
-
-
Schouwenaars, H.1
Groeneveld, D.2
Termeer, H.3
-
8
-
-
0022862503
-
An 80-MHz 84-bit CMOS D/A converter
-
Dec.
-
T. Miki, Y. Nakamura, M. Nakaya, S. Asai, Y. Akasaka, and Y. Horiba, "An 80-MHz 84-bit CMOS D/A converter," IEEE J. Solid-State Circuits, vol. SC-21, no. 6, pp. 983-988, Dec. 1986.
-
(1986)
IEEE J. Solid-State Circuits
, vol.SC-21
, Issue.6
, pp. 983-988
-
-
Miki, T.1
Nakamura, Y.2
Nakaya, M.3
Asai, S.4
Akasaka, Y.5
Horiba, Y.6
-
9
-
-
0004827877
-
-
Electronic Research Laboratory, University of California, Berkeley, Memo. UCB/ERL M95/28, Apr.
-
R. Neff, "Automatic synthesis of CMOS digital/analog converters," Electronic Research Laboratory, University of California, Berkeley, Memo. UCB/ERL M95/28, Apr. 1995.
-
(1995)
Automatic Synthesis of CMOS Digital/analog Converters
-
-
Neff, R.1
-
10
-
-
0022891057
-
Characterization and modeling of mismatch in MOS transistors for precision analog design
-
Dec.
-
K. R. Lakshimikumar, R. A. Hadaway, and M. A. Copeland, "Characterization and modeling of mismatch in MOS transistors for precision analog design," IEEE J. Solid-State Circuits, vol. SC-21, pp. 1057-1066, Dec. 1986.
-
(1986)
IEEE J. Solid-State Circuits
, vol.SC-21
, pp. 1057-1066
-
-
Lakshimikumar, K.R.1
Hadaway, R.A.2
Copeland, M.A.3
-
11
-
-
0024754187
-
Matching properties of MOS transistors
-
Oct.
-
M. J. M. Pelgrom, A. C. J. Duinmaijer, and A. P. G. Welbers, "Matching properties of MOS transistors," IEEE J. Solid-State Circuits, vol. 24, pp. 1433-1439, Oct. 1989.
-
(1989)
IEEE J. Solid-State Circuits
, vol.24
, pp. 1433-1439
-
-
Pelgrom, M.J.M.1
Duinmaijer, A.C.J.2
Welbers, A.P.G.3
-
12
-
-
0026140313
-
A 10-b TO-MS/s MOS D/A converter
-
Apr.
-
Y. Nakamura, T. Miki, A. Maeda, H. Kondoh, and N. Yazawa, "A 10-b TO-MS/s MOS D/A converter," IEEE J. Solid-State Circuits, vol. 26, no. 4, pp. 637-642, Apr. 1991.
-
(1991)
IEEE J. Solid-State Circuits
, vol.26
, Issue.4
, pp. 637-642
-
-
Nakamura, Y.1
Miki, T.2
Maeda, A.3
Kondoh, H.4
Yazawa, N.5
-
15
-
-
0029713096
-
A high yield 12-bit 250-MS/s CMOS D/A converter
-
May
-
J. Bastos, M Steyaert, and W. Sansen, "A high yield 12-bit 250-MS/s CMOS D/A converter," in Proc. IEEE 1996 Custom Integrated Circuits Conf. (CICC), May 1996, pp. 431-434.
-
(1996)
Proc. IEEE 1996 Custom Integrated Circuits Conf. (CICC)
, pp. 431-434
-
-
Bastos, J.1
Steyaert, M.2
Sansen, W.3
-
16
-
-
0031144133
-
Influence of die attachment on MOS transistor matching
-
May
-
J. Bastos, M. Steyaert, A. Pergoot, and W. Sanseen, "Influence of die attachment on MOS transistor matching," IEEE Trans. Semiconduct. Manufact., pp. 209-217, May 1997.
-
(1997)
IEEE Trans. Semiconduct. Manufact.
, pp. 209-217
-
-
Bastos, J.1
Steyaert, M.2
Pergoot, A.3
Sanseen, W.4
-
18
-
-
0024682739
-
A 100-MHz CMOS DAC for video-graphic systems
-
June
-
A. Cremonesi, F. Maloberti, and G. Polito, "A 100-MHz CMOS DAC for video-graphic systems," IEEE J. Solid-State Circuits, vol. 24, no. 3, pp. 635-639, June 1989.
-
(1989)
IEEE J. Solid-State Circuits
, vol.24
, Issue.3
, pp. 635-639
-
-
Cremonesi, A.1
Maloberti, F.2
Polito, G.3
-
19
-
-
0026186375
-
A 130 MHz 8-bit CMOS video DAC for HDTV applications
-
July
-
J. Fournier and P. Senn, "A 130 MHz 8-bit CMOS video DAC for HDTV applications," IEEE J. Solid-State Circuits, vol. 26, no 7, pp. 1073-1077, July 1991.
-
(1991)
IEEE J. Solid-State Circuits
, vol.26
, Issue.7
, pp. 1073-1077
-
-
Fournier, J.1
Senn, P.2
-
20
-
-
0028518013
-
A 16-b D/A converter with increased spurious free dynamic range
-
Oct.
-
D. Mercer, "A 16-b D/A converter with increased spurious free dynamic range," IEEE J. Solid-State Circuits, vol. 29, 10, pp. 1180-1181, Oct. 1994.
-
(1994)
IEEE J. Solid-State Circuits
, vol.29
, Issue.10
, pp. 1180-1181
-
-
Mercer, D.1
-
21
-
-
0029229894
-
A low glitch 10-bit 75-MHz CMOS video D/A converter
-
Jan.
-
T. Wu, C. Jih, J. Chen, and C. Wu, "A low glitch 10-bit 75-MHz CMOS video D/A converter," IEEE J. Solid-State Circuits, vol. 30, no. 1, pp. 68-72, Jan. 1995.
-
(1995)
IEEE J. Solid-State Circuits
, vol.30
, Issue.1
, pp. 68-72
-
-
Wu, T.1
Jih, C.2
Chen, J.3
Wu, C.4
-
22
-
-
0029234496
-
A 350-MS/s 3.3-V 8-bit CMOS D/A converter using a delayed driving scheme
-
May
-
H. Kohno, Y. Nakamura, A. Kondo, H. Amishiro, T. Milki, and K. Okada, "A 350-MS/s 3.3-V 8-bit CMOS D/A converter using a delayed driving scheme," in Proc. IEEE 1995 Custom Integrated Circuits Conf. (CICC), May 1995, pp. 211-213.
-
(1995)
Proc. IEEE 1995 Custom Integrated Circuits Conf. (CICC)
, pp. 211-213
-
-
Kohno, H.1
Nakamura, Y.2
Kondo, A.3
Amishiro, H.4
Milki, T.5
Okada, K.6
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