A Triple-Mode Continuous-Time ∑Δ Modulator with Switched-Capacitor Feedback DAC for a GSM-EDGE/CDMA2000/UMTS Receiver

IEEE Journal of Solid-State Circuits

Volumn 38, Issue 12, 2003, Pages 2069-2076

  Van Veldhoven, Robert H M ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

CDMA2000; EDGE; GSM; Intermediate frequency (IF) conversion; Mobile communication; Sigma delta analog to digital converter (ADC); Sigma delta modulator; Switched capacitor (SC) digital to analog converter (DAC); Telecommunication receiver; UMTS

Indexed keywords

ACOUSTIC NOISE; ANALOG TO DIGITAL CONVERSION; BANDWIDTH; CAPACITORS; CODE DIVISION MULTIPLE ACCESS; COMPUTER SIMULATION; DIGITAL TO ANALOG CONVERSION; FLIP FLOP CIRCUITS; GLOBAL SYSTEM FOR MOBILE COMMUNICATIONS; INTEGRATED CIRCUITS; INTERMODULATION; OSCILLATORS (ELECTRONIC); SIGNAL RECEIVERS; SIGNAL TO NOISE RATIO; TIMING JITTER;

INTERMEDIATE FREQUENCY (IF) CONVERSION; REDUCED JITTER SENSITIVITY; SIGMA-DELTA MODULATORS; TELECOMMUNICATION RECEIVERS;

MODULATORS;

EID: 0346342400     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2003.819165     Document Type: Conference Paper

References (6)

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