A digital background calibration technique for time-interleaved analog-to-digital converters

IEEE Journal of Solid-State Circuits

Volumn 33, Issue 12, 1998, Pages 1904-1911

  Fu, Daihong ^b,c,e,f   Dyer, Kenneth C ^a,b,d,g,h   Lewis, Stephen H ^a,d,i,j,k,l   Hurst, Paul J ^a,d,k,m  

^a IEEE

^b UNIVERSITY OF CALIFORNIA   (United States)

^c MAXIM INTEGRATED PRODUCTS   (United States)

^d University of California   (United States)

^e TSINGHUA UNIVERSITY   (China)

^f LAMAR UNIVERSITY   (United States)

^g Level One Communications   (United States)

^h Tau Beta Pi ^*  (United States)

ⁱ RUTGERS UNIVERSITY   (United States)

^j STANFORD UNIVERSITY   (United States)

^k UNIVERSITY OF CALIFORNIA   (United States)

^l LUCENT TECHNOLOGIES   (United States)

^m Telecom Des Grp Silicon Syst I   (United States)

more..

Author keywords

Adaptive systems; Analog digital conversion; Calibration; CMOS analog integrated circuits

Indexed keywords

ANALOG TO DIGITAL CONVERSION; CALIBRATION; CMOS INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; MULTIPLEXING EQUIPMENT; SIGNAL TO NOISE RATIO;

ANALOG DEMULTIPLEXER; ANALOG TO DIGITAL CONVERTER; DIGITAL BACKGROUND CALIBRATION; DIGITAL MULTIPLEXER;

ELECTRIC CONVERTERS;

EID: 0032313025     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.735530     Document Type: Article

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