A 1.6-GS/s 12-bit return-to-zero GaAs RF DAC for multiple nyquist operation

IEEE Journal of Solid-State Circuits

Volumn 40, Issue 12, 2005, Pages 2456-2468

  Choe, Myung Jun ^a,b,c   Baek, Kwang Hyun ^a,b   Teshome, Mesfin ^b,d  

^a IEEE   (United States)

^b ROCKWELL SCIENTIFIC COMPANY   (United States)

^c Rockwell Scientific   (United States)

^d Mixed Signal IC Products Engineering Department

Author keywords

DAC; GaAs; Multiple Nyquist; Return to zero; RF

Indexed keywords

MULTIPLE NYQUIST; RETURN-TO-ZERO; RF;

BANDWIDTH; CMOS INTEGRATED CIRCUITS; HETEROJUNCTION BIPOLAR TRANSISTORS; SEMICONDUCTING GALLIUM; SWITCHING;

DIGITAL TO ANALOG CONVERSION;

EID: 29044439640     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2005.856276     Document Type: Conference Paper

References (22)

1. A. Yamagishi, M. Ishikawa, T. Tsukahara, and D. Date, "A 2-V, 2-GHz low-power direct digital frequency synthesizer chip-set for wireless communication," IEEE J. Solid-State Circuits, vol. 33, no. 2, pp. 210-217, Feb. 1998.
2. A. Gutierrez-Aitken et al, "Ultrahigh-Speed direct digital synthesizer using InP DHBT technology," IEEE J. Solid-State Circuits, vol. 37. no. 9, pp. 1115-1119, Sep. 2002.
3. B. Scharferer and R. Adams, "A 3 V CMOS 400 mW 14 bit 1.4 GS/s DAC for multi-carrier applications," in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, 2004, pp. 360-369.
4. A. van den Bosch, M. A. F. Borremans, M. S. J. Steyaert, and W. Sansen, "A 10-bit 1-GSample/s nyquist current-steering CMOS D/A converter," IEEE J. Solid-State Circuits, vol. 36, no. 3, pp. 315-324, Mar. 2001.
5. 2," IEEE J. Solid-State Circuits, vol. 33, no. 12, pp. 1948-1958, Dec. 1998.
6. T. Lin and H. Samulei, "A 200-MHz CMOS x / sin(x) digital filter for compensating D/A converter frequency response distortion." IEEE J. Solid-State Circuits, vol. 26, no. 9, pp. 1278-1285, Sep. 1991.
7. A. Bugeja, B.-S. Song, P. Rakers, and S. Gilling, "A 14-bit. 100-MS/s CMOS DAC designed for spectral performance," IEEE J. Solid-State Circuits, vol. 34, no. 12, pp. 1719-1732, Dec. 1999.
8. A. Bugeja and B.-S. Song, "A self-trimming 14-bit 100-MS/s CMOS DAC," IEEE J. Solid-State Circuits, vol. 35, no. 12, pp. 1841-1852, Dec. 2000.
9. Y. Cong and R. Geiger, "A 1.5-V 14-bit 100-MS/s self-calibrated DAC," IEEE J. Solid-State Circuits, vol. 38, no. 12, pp. 2051-2060, Dec. 2003.
10. R. J. van De Plassche, "Dynamic element matching for high-accuracy monolithic D/A converters," IEEE J. Solid-State Circuits, vol. 11, no. 12, pp. 795-800, Dec. 1976.
11. J. Bastos, A. M. Marques, M. S. J. Steyaert, and W. Sansen, "A 12-bit intrinsic accuracy high-speed CMOS DAC," IEEE J. Solid-State Circuits, vol. 33, no. 12, pp. 1959-1969, Dec. 1998.
12. G. A. M. van Der Plas, J. Vandenbussche, W. Sansen, M. S. J. Steyaert, and G. G. E. Gielen, "A 14-bit intrinsic accuracy Q2 random walk CMOS DAC," IEEE J. Solid-State Circuits, vol. 34, no. 12, pp. 1708-1718, Dec. 1999.
13. D. Mercer, "A 16-bit D/A converter with increased spurious free dynamic range," IEEE J. Solid-State Circuits, vol. 29, no. 10, pp. 1180-1185, Oct. 1994.
14. S. Park, G. Kim, S.-C. Park, and W. Kim, "A digital-to-analog converter based on differential-quad switching," IEEE J. Solid-State Circuits, vol. 37, no. 10, pp. 1335-1338, Oct. 2002.
15. 2," IEEE J. Solid-State Circuits, vol. 39, no. 7, pp. 1064-1072, Jul. 2004.
16. W. Schofield, D. Mercer, and L. S. Onge, "A 16 bit 400 MS/s DAC with < -80 dBc IMD to 300 MHz and < -160 dBm/Hz noise power spectral density," in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, 2003, pp. 126-127.
17. A. Joseph, L. Lanzerotti, X. Liu, D. Sheridan, J. Johnson, Q. Liu, J. Dunn, J.-S. Rieh, and D. Harame, "Advances in SiGe HBT BICMOS technology," in Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Dig. Papers, Sep. 2004, pp. 1-4.
18. K. Rajendran, J. Johnson, S. Furkay, M. Kumar, and S. Fischer, "Measurement and 3-D simulations of substrate noise isolation and resistance for mixed signal applications," in Topical Meetings on Silicon Monolithic Integrated Circuits in RF Systems, Dig. Papers, Sep. 2004, pp. 99-102.
19. M. Rodwell, Z. Griffith, D. Scott, Y. Wei, Y. Dong, M. Urteaga, R. Pierson, S. Lee, N. Nguyen, V. Paidi, M. Dahlstrom, N. Parthasarathy, C. Rowell, B. Brar, and C. Nguyen, "Transistor and circuit design for 100-200 GHz ICs," in Compound Semiconductor Integrated Circuit Symp., Dig. Tech. Papers, Oct. 2004, pp. 207-210.
20. K.-H. Back, M.-J. Choe, E. Merlo, and S.-M. Kang, "Addressing a highspeed D/A converter design for mixed-mode VLSI systems," in Southwest Symp. Mixed-Signal Design, Dig. Tech. Papers, 2003, pp. 21-26.
21. R. Jewett, L. Liu, and K. Poulton, "A 1.2 GS/s 15 bit DAC for precision signal generation," in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2005, pp. 110-111.
22. M. Choe, K. Back, and M. Teshome, "A 1.6 GS/s 12 b return-to-zero GaAs RF DAC for multiple Nyquist operation," in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2005, pp. 112-114.