A continuous-time ∑Δ ADC with increased immunity to interferers

IEEE Journal of Solid-State Circuits

Volumn 39, Issue 12, 2004, Pages 2170-2178

  Philips, Kathleen ^a   Nuijten, Peter A C M ^a   Roovers, Raf L J ^a   Van Roermund, Arthur H M ^b   Chavero, Fernando Muñoz ^c   Pallarés, Macarena Tejero ^c   Torralba, Antonio ^c  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

^b EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

^c UNIVERSITY OF SEVILLE   (Spain)

Author keywords

Analog to digital conversion; Bluetooth; Channel filter; Continuous time; Digitization; IF conversion; Interferer; Receiver; Sigma delta ADC; Sigma delta modulator

Indexed keywords

BANDWIDTH; ERROR ANALYSIS; FUNCTIONS; INTEGRATION; INTERMODULATION; SIGNAL TO NOISE RATIO;

BLUETOOTH; CHANNEL FILTER; CONTINUOUS TIME; IF CONVERSION; INTERFERER; RECEIVER; SIGMA-DELTA ADC; SIGMA-DELTA MODULATOR;

DELTA SIGMA MODULATION;

EID: 10444270156     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2004.836248     Document Type: Conference Paper

References (11)

1. H. Darabi, S. Khorram, H.-M. Chien, M.-A. Pan, S. Wu, S. Moloudi, J. C. Leete, J. J. Rael, M. Syed, R. Lee, B. Ibrahim, M. Rofougaran, and A. Rofougaran, "A 2.4 GHz CMOS transceiver for Bluetooth," IEEE J. Solid-State Circuits, vol. 36, pp. 2016-2024, Dec. 2001.
2. W. Sheng, B. Xia, A. E. Emira, C. Xin, A. Y. Valero-Lopez, and S. T. Moon, "A 3 V, 0.35 μm CMOS Bluetooth receiver IC," IEEE J. Solid-State Circuits, vol. 38, pp. 30-42, Jan. 2003.
3. H. J. Bergveld, K. M. M. van Kaam, D. M. W. Leenaerts, K. J. P. Philips, A. W. P. Vaassen, and G. Wetzker, "A low-power highly-digitized receiver for 2.4-GHz-band GFSK applications," in RFIC Symp. Dig. Tech. Papers, sec. TU4A-4, June 2004.
4. K. Philips, "A 4.4 mW 76 dB ∑Δ ADC for Bluetooth receivers," in IEEE ISSCC Dig. Tech. Papers, Feb. 2003, pp. 64-65, 478.
5. E. J. van der Zwan, K. Philips, and C. A. A. Bastiaansen, "A 10.7-MHz IF-to-baseband ∑Δ A/D conversion system for AM/FM radio receivers," IEEE J. Solid-State Circuits, vol. 35, pp. 1810-1819, Dec. 2000.
6. R. H. M. van Veldhoven, "A triple-mode continuous-time ∑Δ modulator with switched-capacitor feedback DAC for a GSM-EDGE/ CDMA200/UMTS receiver," IEEE J. Solid-State Circuits, vol. 38, pp. 2069-2076, Dec. 2003.
7. E. J. van der Zwan and E. C. Dijkmans, "0.2-mW CMOS ∑Δ modulator for speech coding with 80 dB dynamic range," IEEE J. Solid-State Circuits, vol. 31, pp. 1873-1880, Dec. 1996.
8. [8) D. Reefman and E. Janssen, "DC analysis of high order sigma delta modulators," presented at the AES 113th Conv., Los Angeles, CA, Sept. 2002, paper 5693.
9. L. J. Breems, Continuous-Time Sigma-Delta Modulation for IF A/D Conversion in Radio Receivers. Dordrecht, The Netherlands: Kluwer, 2001.
10. S. R. Norsworthy, R. Schreier, and G. C. Temes, Delta-Sigma Data Converters: Theory, Design and Simulation. New York: IEEE Press, 1997.
11. J. A. Cherry and W. M. Snelgrove, Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion. Boston, MA: Kluwer, 2000.