12-b digital-background-calibrated algorithmic ADC with -90-dB THD

IEEE Journal of Solid-State Circuits

Volumn 34, Issue 12, 1999, Pages 1812-1820

  Erdoǧan, Ozan E ^a   Hurst, Paul J ^a   Lewis, Stephen H ^a  

^a University of California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE ALGORITHMS; ANALOG TO DIGITAL CONVERSION; CALIBRATION; COMPUTER ARCHITECTURE; ENERGY DISSIPATION; INTEGRATED CIRCUIT LAYOUT; QUEUEING NETWORKS; SIGNAL TO NOISE RATIO; SPURIOUS SIGNAL NOISE;

ADAPTIVE DIGITAL-CALIBRATION ALGORITHMS; ANALOG QUEUE-BASED ARCHITECTURES; MONOLITHIC BACKGROUND CALIBRATIONS;

CMOS INTEGRATED CIRCUITS;

EID: 18544399632     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.808906     Document Type: Article

References (19)

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