A 150-MS/s 8-b 71-mW CMOS time-interleaved ADC

IEEE Journal of Solid-State Circuits

Volumn 40, Issue 5, 2005, Pages 1057-1066

  Limotyrakis, Sotirios ^a   Kulchycki, Scott D ^a   Su, David K ^b   Wooley, Bruce A ^a  

^a Stanford University   (United States)

^b Atheros Communications   (United States)

Author keywords

Analog digital (A D) conversion; CMOS analog integrated circuits; Comparators; Folding A D converters; Mixed analog digital integrated circuits; Operational amplifiers; Pipeline processing; Switched capacitor circuits

Indexed keywords

CAPACITANCE; CAPACITORS; CMOS INTEGRATED CIRCUITS; ELECTRIC POWER UTILIZATION; ELECTRIC RESISTANCE; ELECTRIC SWITCHES; LOCAL AREA NETWORKS; OPERATIONAL AMPLIFIERS;

ANALOG-DIGITAL (A/D) CONVERSION; CMOS ANALOG INTEGRATED CIRCUITS; COMPARATORS; FOLDING A/D CONVERTERS; MIXED ANALOG-DIGITAL INTEGRATED CIRCUITS; PIPELINE PROCESSING; SWITCHED-CAPACITOR CIRCUITS;

ANALOG TO DIGITAL CONVERSION;

EID: 18444393987     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2005.845992     Document Type: Article

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