A CMOS 110-dB@40-kS/s programmable-gain chopper-stabilized third-order 2-1 cascade sigma-delta modulator for low-power high-linearity automotive sensor ASICs

IEEE Journal of Solid-State Circuits

Volumn 40, Issue 11, 2005, Pages 2246-2264

  De La Rosa, José M ^a,b,c   Escalera, Sara ^b   Pérez Verdú, Belén ^b,c   Medeiro, Fernando ^a,b,d   Guerra, Oscar ^b,c   Río, Rocío Del ^a,b,c   Rodríguez Vázquez, Angel ^a,b,c  

^a IEEE   (Spain)

^b INSTITUTO DE MICROELECTRÓNICA DE SEVILLA   (Spain)

^c UNIVERSITY OF SEVILLE   (Spain)

^d UNIVERSIDAD DE SEVILLA   (Spain)

Author keywords

Analog to digital conversion; Mixed analog digital integrated circuits; Sampled data circuits; Sigma delta modulation

Indexed keywords

AUTOMOTIVE SENSORS; MIXED ANALOG-DIGITAL INTEGRATED CIRCUITS; MODULATOR ARCHITECTURE; SAMPLED DATA CIRCUITS;

ANALOG TO DIGITAL CONVERSION; APPLICATION SPECIFIC INTEGRATED CIRCUITS; AUTOMOTIVE ENGINEERING; DELTA SIGMA MODULATION; OPTIMIZATION; SENSORS; STATISTICAL METHODS;

CMOS INTEGRATED CIRCUITS;

EID: 27844585171     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2005.857356     Document Type: Article

References (31)

1. W. J. Fleming, "Overview of automotive sensors," IEEE Sensors J., pp. 296-308, Dec. 2001.
2. D. S. Eddy and D. R. Sparks, "Application of MEMS technology in automotive sensors and actuators," Proc. IEEE, pp. 1747-1755, Aug. 1998.
3. J. E. Johnston, "A 24-bit delta-sigma ADC with an ultra-low noise chopper-stabilized programmable gain instrumentation amplifier," in Proc. Conf. Advances A/D and D/A Conversion Techniques and Their Applications, 1999, pp. 27-28.
4. P. Malcovati and F. Maloberti, "An integrated microsystem for 3-D magnetic field measurements," IEEE Trans. Instrum. Meas., vol. 49, no. 2, pp. 341-345, Apr. 2000.
5. C. B. Wang, "A 20-bit 25-kHz delta-sigma A/D converter utilizing a frequency-shaped chopper stabilization scheme," IEEE J. Solid-State Circuits, vol. 36, no. 3, pp. 566-569, Mar. 2001.
6. S. R. Norsworthy, R. Schreier, and G. Temes, Delta-Sigma Data Converters-Theory, Design and Simulation. New York: IEEE Press, 1997.
7. F. Medeiro, B. Pérez-Verdú, and A. Rodríguez- Vázquez, Top-Down Design of High-Performance Sigma-Delta Modulators. Norwood, MA: Kluwer, 1999.
8. K. A. A. Makinwa and J. H. Huijsing, "A smart CMOS wind sensor," in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, 2002, pp. 432-479.
9. H. Kulah, N. Yazdi, and K. Najafi, "A CMOS switched-capacitor interface circuit for an integrated accelerometer," Proc. IEEE Midwest Symp. Circuits and Systems, pp. 244-247, Aug. 2002.
10. S. Rabii and B. A. Wooley, "A 1.8-V digital-audio sigma-delta modulator in 0.8-μm CMOS," IEEE J. Solid-State Circuits, vol. 32, no. 6, pp. 783-796, Jun. 1997.
11. 2", IEEE J. Solid-State Circuits, vol. 38, no. 12, pp. 2061-2068, Dec. 2003.
12. L. Yao, M. S. J. Steyaert, and W. Sansen, "A 1-V 140-μW 88-dB audio sigma-delta modulator in 90-nm CMOS," IEEE J. Solid-State Circuits, vol. 39, no. 11, pp. 1809-1818, Nov. 2004.
13. A. L. Coban and P. E. Allen, "A 1.5 V 1.0 mW audio delta sigma modulator with 98 dB dynamic range," in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, 1999, pp. 50-51.
14. F. Medeiro, R. del Río, J. M. de la Rosa, B. Pérez- Verdú, and A. Rodríguez-Vázquez, "High-Order Cascade Multi-Bit ΣΔ Modulators," in CMOS Telecom Data Converters, A. Rodríguez-Vázquez, F. Medeiro, and E. Janssens, Eds. Boston, MA: Kluwer Academic, 2003, ch. 9.
15. I. Fujimori, L. Longo, A. Hairapetian, K. Seiyama, S. Kosic, J. Cao, and S. L. Chan, "A 90-dB SNR 2.5-MHz output-rate ADC using cascaded multibit delta-sigma modulation at 8 × oversampling ratio," IEEE J. Solid-State Circuits, vol. 35, no. 12, pp. 1820-1828, Dec. 2000.
16. R. del Río, J. M. de la Rosa, B. Pérez-Verdú, M. Delgado-Restituto, R. Domínguez-Castro, F. Medeiro, and A. Rodríguez-Vázquez, "Highly linear 2.5-V CMOS ΣΔ modulator for ADSL+," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 51, no. 1, pp. 47-62, Jan. 2004.
17. A. M. Marques, V. Peluso, M. S. J. Steyaert, and W. Sansen, "A 15-b resolution 2-MHz nyquist rate ΔΣ ADC in a 1-μm CMOS technology," IEEE J. Solid-State Circuits, vol. 33, no. 7, pp. 1065-1075, Jul. 1998.
18. G. Yin, "High-performance analog-to-digital converters using cascaded Sigma;Δ modulators," Ph.D. dissertation, Katholieke Universiteit Leuven, Belgium, 1994.
19. F. V. Fernández, R. del Río, R. Castro-López, O. Guerra, F. Medeiro, and B. Pérez-Verdú, "Design Methodologies for Sigma-Delta Converters," in CMOS Telecom Data Converters, A. Rodríguez-Vázquez, F. Medeiro, and E. Janssens, Eds. Boston, MA: Kluwer Academic, 2003, ch. 15.
20. B. Razavi, Design of Analog CMOS Integrated Circuits. New York: McGraw-Hill, 2000.
21. C. C. Enz and G. C. Temes, "Circuit techniques for reducing the effects of op-amp imperfections: Autozeroing, correlated double sampling, and chopper stabilization," Proc. IEEE, vol. 84, no. 11, pp. 1584-1614, Nov. 1996.
22. F. Medeiro, B. Pérez-Verdú, A. Rodríguez- Vázquez, and J. L. Huertas, "A vertically integrated tool for automated design of ΣΔ modulators," IEEE J. Solid-State Circuits, vol. 30, no. 7, pp. 762-772, Jul. 1995.
23. G. M. Yin, F. Op't Eynde, and W. Sansen, "A high-speed CMOS comparator with 8-b resolution," IEEE J. Solid-State Circuits, vol. 27, no. 2, pp. 208-211, Feb. 1992.
24. W. Yu, S. Sen, and B. H. Leung, "Distortion analysis of MOS track-and-hold sampling mixers using time-varying volterra series," IEEE Trans. Circuits Syst. II, vol. 46, no. 2, pp. 101-113, Feb. 1999.
25. J.-T. Wu and K.-L. Chang, "MOS charge pumps for low-voltage operation," IEEE J. Solid-State Circuits, vol. 33, no. 4, pp. 592-597, Apr. 1998.
26. K. Lee and R. G. Meyer, "Low distortion switched-capacitor filter design techniques," IEEE J. Solid-State Circuits, vol. SC-20, no. 12, pp. 1103-1113, Dec. 1985.
27. J. W. Fattaruso, M. De Wit, G. Warwar, K. S. Tan, and R. K. Hester, "The effect of dielectric relaxation on charge-redistribution A/D converters," IEEE J. Solid-State Circuits, vol. 25, no. 12, pp. 1550-1561, Dec. 1990.
28. M. F. Snoeij, O. Bajdechi, and J. H. Huijsing, "A fourth-order switched-capacitor sigma-delta A/D converter using a high-ripple chebyshev loop filter," in Proc. IEEE Int. Symp. Circuits and Systems, 2001, pp. 615-618.
29. O. Nys and R. K. Henderson, "A 19-bit low-power multibit sigma-delta ADC based on data weighted averaging," IEEE J. Solid-State Circuits, vol. 32, no. 7, pp. 933-942, Jul. 1997.
30. D. A. Kerth, D. B. Kasha, T. G. Mellissinos, D. S. Piasecki, and E. J. Swanson, "A 120-dB linear switched-capacitor delta-sigma modulator," in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, 1994, pp. 196-197.
31. S. Yan and E. Sánchez-Sincenio, "A continuous-time ΣΔ modulator with 88-dB dynamic range and 1.1 -MHz signal bandwidth," IEEE J. Solid-State Circuits, vol. 39, no. 1, pp. 75-86, Jan. 2004.