80-MHz bandpass ΔΣ modulators for multimode digital IF receivers

IEEE Journal of Solid-State Circuits

Volumn 38, Issue 3, 2003, Pages 464-474

  Salo, Teemu O ^a   Lindfors, Saska J ^b   Hollman, Tuomas M ^a   Järvinen, Jere A M ^a   Halonen, Kari A I ^c  

^a AALTO UNIVERSITY   (Finland)

^b AALBORG UNIVERSITY   (Denmark)

^c TEXAS INSTRUMENTS   (United States)

Author keywords

Analog digital conversion; Bandpass delta sigma modulation; Double delay resonators; IF systems; Multimode; Sampled data circuits; Subsampling; Switched capacitor resonators

Indexed keywords

CAPACITORS; CMOS INTEGRATED CIRCUITS; DELTA SIGMA MODULATION; DIGITAL SIGNAL PROCESSING; ELECTRIC POWER SUPPLIES TO APPARATUS; MODULATORS; OPERATIONAL AMPLIFIERS; RESONATORS; SIGNAL DISTORTION; SIGNAL NOISE MEASUREMENT; SIGNAL RECEIVERS; SIGNAL TO NOISE RATIO;

DIGITAL RECEIVERS; DOUBLE DELAY RESONATORS; INTERMEDIATE FREQUENCY RECEIVER; MULTIMODE RECEIVERS; SAMPLED DATA CIRCUITS;

FREQUENCY CONVERTER CIRCUITS;

EID: 0037347737     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2002.808327     Document Type: Article

References (18)

1. A. Hairapetian, "An 81-MHz IF receiver in CMOS," IEEE J. Solid-State Circuits, vol. 31, pp. 1981-1986, Dec. 1996.
2. F. Singor and W. M. Snelgrove, "Switched-capacitor bandpass delta-sigma A/D modulation at 10.7 MHz," IEEE J. Solid-State Circuits, vol. 30, pp. 184-192, Mar. 1995.
3. A. Ong and B. Wooley, "A two-path bandpass ΣΔ modulator for digital IF extraction at 20 MHz," IEEE J. Solid-State Circuits, vol. 32, pp. 1920-1934, Dec. 1997.
4. T. Salo, S. Lindfors, and K. Halonen, "An 80-MHz bandpass ΔΣ modulator for a 100-MHz IF receiver," IEEE J. Solid-State Circuits, vol. 37, pp. 798-808, July 2002.
5. H. Tao, L. Toth, and J. Khoury, "Analysis of timing jitter in bandpass sigma-delta modulators," IEEE Trans. Circuits Syst. II, vol. 46, pp. 991-1001, Aug. 1999.
6. J. Ryynänen, K. Kivekäs, J. Jussila, A. Pärssinen, and K. Halonen, "A dual-band RF front-end for WCDMA and GSM applications," IEEE J. Solid-State Circuits, vol. 36, pp. 1198-1204, Aug. 2001.
7. ETSI, Universal Mobile Telecommunications System (UMTS); UE Radio Transmission and Reception (FDD); 3GPP TS 25.101 Version 3.10.0 Release 1999.
8. T. Kuo and B. Lusignan, "A very low power channel select filter for IS-95 CDMA receiver with on-chip tuning," in Symp. VLSI Circuits Dig., 2000, pp. 244-247.
9. ETSI, Digital Cellular Telecommunications System (Phase 2+); Radio Transmission and Reception; 3GPP TS 05.05 Version 8.9.0 Release 1999.
10. S. Lindfors, M. Länsirinne, T. Lindeman, and K. Halonen, "On the design of second-order multibit ΔΣ modulators," in Proc. IEEE Int. Symp. Circuits and Systems, vol. 2, May 1999, pp. 13-16.
11. T. Salo, S. Lindfors, and K. Halonen, "A double sampling SC resonator for low-voltage bandpass ΔΣ modulators," IEEE Trans. Circuits Syst. II, vol. 49, Dec. 2002.
12. S. Liu, C. Kuo, R. Tsai, and J. Wu, "A double-sampling pseudo-two-path bandpass ΔΣ modulator," IEEE J. Solid-State Circuits, vol. 35, pp. 276-280, Feb. 2000.
13. T. Salo, S. Lindfors, and K. Halonen, "A low-voltage single-opamp fourth-order bandpass ΔΣ modulator," in Proc. IEEE Int. Symp. Circuits and Systems, vol. 1, May 2001, pp. 352-355.
14. T. Leslie and B. Singh, "An improved sigma-delta modulator architecture," in Proc. IEEE Int. Symp. Circuits and Systems, 1990, pp. 372-375.
15. S. Lindfors, M. Länsirinne, and K. Halonen, "A 2.7-V 50-MHz IF sampling ΔΣ modulator with +37-dBV IIP3," Electron. Lett., vol. 37, pp. 150-151, Feb. 2001.
16. T. Salo, T. Hollman, S. Lindfors, and K. Halonen, "A dual-mode 80-MHz bandpass ΔΣ modulator for a GSM/WCDMA IF receiver," in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, 2002, pp. 218-219.
17. T. Salo, S. Lindfors, and K. Halonen, "An 80-MHz 8th-order bandpass ΔΣ modulator with a 75-dB SNDR for IS-95," in Proc. IEEE Custom Integrated Circuits Conf., May 2002, pp. 179-182.
18. M. Waltari, L. Sumanen, T. Korhonen, and K. Halonen, "A self-calibrated pipeline ADC with 200-MHz IF sampling front-end," in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, 2002, pp. 314-315.