A 250-mW, 8-b, 52-Msamples/s parallel-pipelined A/D converter with reduced number of amplifiers

IEEE Journal of Solid-State Circuits

Volumn 32, Issue 3, 1997, Pages 312-320

  Nagaraj, Krishnaswamy ^{a,b,c,e,f,g,h,i}   Fetterman, H Scott ^b,i,j,k   Anidjar, Joseph ^b,l,m   Lewis, Stephen H ^{a,d,i,n,o,p,q}   Renninger, Robert G ^{b,i,r,s,t,u,v}  

^a IEEE   (United States)

^b NOKIA RESEARCH CENTER   (United States)

^c TEXAS INSTRUMENTS   (United States)

^d UNIVERSITY OF CALIFORNIA   (United States)

^e BANGALORE UNIVERSITY   (India)

^f INDIAN INSTITUTE OF SCIENCE   (India)

^g R and D Laboratories   (India)

^h UNIVERSITY OF WATERLOO   (Canada)

ⁱ LUCENT TECHNOLOGIES   (United States)

^j PENNSYLVANIA STATE UNIVERSITY   (United States)

^k LEHIGH UNIVERSITY   (United States)

^l CITY COLLEGE OF NEW YORK   (United States)

^m NEW JERSEY INSTITUTE OF TECHNOLOGY   (United States)

ⁿ RUTGERS UNIVERSITY   (United States)

^o STANFORD UNIVERSITY   (United States)

^p UNIVERSITY OF CALIFORNIA   (United States)

^q University of California   (United States)

^r MICHIGAN STATE UNIVERSITY   (United States)

^s UNIVERSITY OF ARKANSAS   (United States)

^t Satellite Transmission Laboratory

^u Electrostatic Discharge Studs Group

^v Microelectronics Group of AT and T

more..

Author keywords

Analog to digital conversion; Parallel analog to digital conversion; Pipelined analog to digital conversion

Indexed keywords

CMOS INTEGRATED CIRCUITS; OPERATIONAL AMPLIFIERS; PARALLEL PROCESSING SYSTEMS; PIPELINE PROCESSING SYSTEMS; VIDEO SIGNAL PROCESSING;

PIPELINED CONVERTERS; SWITCHED DIGITAL VIDEO;

ANALOG TO DIGITAL CONVERSION;

EID: 0031102957     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.557628     Document Type: Article

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