Digital background calibration of an algorithmic analog-to-digital converter using a simplified queue

IEEE Journal of Solid-State Circuits

Volumn 38, Issue 6, 2003, Pages 1059-1062

  Blecker, Eric B ^a,b   McDonald, Thomas M ^a,c   Erdoǧan, Ozan E ^a,d   Hurst, Paul J ^e   Lewis, Stephen H ^e  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b BROADCOM CORPORATION   (United States)

^c INTEL CORPORATION   (United States)

^d Berkana Wireless   (United States)

^e University of California   (United States)

Author keywords

Adaptive systems; Analog digital conversion; Calibration; CMOS analog integrated circuits

Indexed keywords

ADAPTIVE ALGORITHMS; CMOS INTEGRATED CIRCUITS; SIGNAL TO NOISE RATIO; SOFTWARE PROTOTYPING; SPURIOUS SIGNAL NOISE;

POWER DISSIPATION;

ANALOG TO DIGITAL CONVERSION;

EID: 0038380412     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2003.811990     Document Type: Article

References (8)

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