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Volumn 39, Issue 8, 2004, Pages 1341-1346

A 10.7-MHz self-calibrated switched-capacitor-based multibit second-order bandpass ∑Δ modulator with on-chip switched buffer

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; BANDPASS AMPLIFIERS; BANDWIDTH; CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; ELECTRIC POWER UTILIZATION; MICROPROCESSOR CHIPS; MODULATORS; SPURIOUS SIGNAL NOISE;

EID: 3843052433     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2004.831487     Document Type: Article
Times cited : (21)

References (22)
  • 1
    • 0029267775 scopus 로고
    • Switohed-capacitor bandpass delta-sigma A/D modulation at 10.7 MHz
    • Mar.
    • F. W. Singor and W. M. Snelgrove, "Switohed-capacitor bandpass delta-sigma A/D modulation at 10.7 MHz," IEEE J. Solid-State Circuits, vol. 30, pp. 184-192, Mar. 1995.
    • (1995) IEEE J. Solid-state Circuits , vol.30 , pp. 184-192
    • Singor, F.W.1    Snelgrove, W.M.2
  • 3
    • 0035310053 scopus 로고    scopus 로고
    • A 3.3 V CMOS 10.7 MHz 6th-order bandpass ∑Δ modulator with 74 dB dynamic range
    • Apr.
    • D. Tonietto, P. Cusinato, F. Stefani, and A. Baschirotto, "A 3.3 V CMOS 10.7 MHz 6th-order bandpass ∑Δ modulator with 74 dB dynamic range," IEEE J. Solid-State Circuits, vol. 36, pp. 629-638, Apr. 2001.
    • (2001) IEEE J. Solid-state Circuits , vol.36 , pp. 629-638
    • Tonietto, D.1    Cusinato, P.2    Stefani, F.3    Baschirotto, A.4
  • 4
    • 0033114883 scopus 로고    scopus 로고
    • An eighth-order bandpass ∑Δ modulator for A/D conversion in digital radio
    • Apr.
    • L. Louis et al., "An eighth-order bandpass ∑Δ modulator for A/D conversion in digital radio," IEEE J. Solid-State Circuits, vol. 34, pp. 423-431, Apr. 1999.
    • (1999) IEEE J. Solid-state Circuits , vol.34 , pp. 423-431
    • Louis, L.1
  • 5
    • 0031332067 scopus 로고    scopus 로고
    • A two-path bandpass ∑ Δ modulator for digital if extraction at 20 MHz
    • Dec.
    • A. K. Ong and B. A. Wooley, "A two-path bandpass ∑ Δ modulator for digital IF extraction at 20 MHz," IEEE J. Solid-State Circuits, vol. 32, pp. 1920-1934, Dec. 1997.
    • (1997) IEEE J. Solid-state Circuits , vol.32 , pp. 1920-1934
    • Ong, A.K.1    Wooley, B.A.2
  • 6
    • 0036641817 scopus 로고    scopus 로고
    • A fourth-order bandpass delta-sigma modulator using second-order bandpass noise-shaping dynamic element matching
    • July
    • TV Ueno, A. Yasuda, T. Yamaji, and T. Itakura, "A fourth-order bandpass delta-sigma modulator using second-order bandpass noise-shaping dynamic element matching," IEEE J. Solid-State Circuits, vol. 37, pp. 809-816, July 2002.
    • (2002) IEEE J. Solid-state Circuits , vol.37 , pp. 809-816
    • Ueno, T.V.1    Yasuda, A.2    Yamaji, T.3    Itakura, T.4
  • 7
    • 0029510571 scopus 로고
    • A fourth-order bandpass delta-sigma modulator with reduced number of op amps
    • Dec.
    • B.-S. Song, "A fourth-order bandpass delta-sigma modulator with reduced number of op amps," IEEE J. Solid-State Circuits, vol. 30, pp. 1309-1315, Dec. 1995.
    • (1995) IEEE J. Solid-state Circuits , vol.30 , pp. 1309-1315
    • Song, B.-S.1
  • 9
    • 0031070177 scopus 로고    scopus 로고
    • A 16-b ∑Δ pipeline ADC with 2.5-MHz output data-rate
    • Feb.
    • T. L. Brooks et al., "A 16-b ∑Δ pipeline ADC with 2.5-MHz output data-rate," in IEEE ISSCC Dig. Tech. Papers, Feb. 1997, pp. 208-209, 458.
    • (1997) IEEE ISSCC Dig. Tech. Papers , pp. 208-209
    • Brooks, T.L.1
  • 10
    • 3843106258 scopus 로고    scopus 로고
    • "Buffering stage to reduce spikes for SC input structure applied to high speed, high resolution A/D converters," Italian Patent Appl. MI2003A000154, Jan. 30
    • V. Colonna, A. Baschirotto, and G. Gandolfi, "Buffering stage to reduce spikes for SC input structure applied to high speed, high resolution A/D converters," Italian Patent Appl. MI2003A000154, Jan. 30, 2003.
    • (2003)
    • Colonna, V.1    Baschirotto, A.2    Gandolfi, G.3
  • 11
    • 3843120289 scopus 로고    scopus 로고
    • "Switched-capacitor analog circuits with low input capacitance," U.S. Patent 5,617,093, Apr. 1
    • H. W. Klein, "Switched-capacitor analog circuits with low input capacitance," U.S. Patent 5,617,093, Apr. 1, 1997.
    • (1997)
    • Klein, H.W.1
  • 12
    • 0034476161 scopus 로고    scopus 로고
    • A 10.7-MHz IF-to-baseband ∑Δ A/D conversion system for AM/FM radio receivers
    • Dec.
    • E. J. van der Zwan, K. Philips, and C. A. A. Bastiaansen, "A 10.7-MHz IF-to-baseband ∑Δ A/D conversion system for AM/FM radio receivers," IEEE J. Solid-State Circuits, vol. 35, pp. 1810-1819, Dec. 2000.
    • (2000) IEEE J. Solid-state Circuits , vol.35 , pp. 1810-1819
    • Van Der Zwan, E.J.1    Philips, K.2    Bastiaansen, C.A.A.3
  • 14
    • 0022678869 scopus 로고
    • Design and implementation of an audio 18-bit analog-to-digital converter using oversampling techniques
    • Mar.
    • R. W. Adams, "Design and implementation of an audio 18-bit analog-to-digital converter using oversampling techniques," J. Audio Eng. Soc., pp. 153-166, Mar. 1986.
    • (1986) J. Audio Eng. Soc. , pp. 153-166
    • Adams, R.W.1
  • 15
    • 0031257247 scopus 로고    scopus 로고
    • Spectral shaping of circuit errors in digital-to-analog converters
    • Oct.
    • I. Galton, "Spectral shaping of circuit errors in digital-to-analog converters," IEEE Trans. Circuits Syst. II, vol. 44, pp. 808-907, Oct. 1997.
    • (1997) IEEE Trans. Circuits Syst. II , vol.44 , pp. 808-907
    • Galton, I.1
  • 16
    • 3843089876 scopus 로고    scopus 로고
    • "Boosted switch device for a sampler of an analog/digital converter, and operating method thereof," U.S. Patent 6,518,901B2, Feb. 11
    • C. Pinna and G. Niccolini, "Boosted switch device for a sampler of an analog/digital converter, and operating method thereof," U.S. Patent 6,518,901B2, Feb. 11, 2003.
    • (2003)
    • Pinna, C.1    Niccolini, G.2
  • 17
    • 3042847852 scopus 로고    scopus 로고
    • Self-tuning algorithms for high-performance bandpass switched-capacitor ∑Δ modulators
    • Jan.
    • G. Gandolfi, V. Colonna, M. Annovazzi, A. Baschirotto, and F. Stefani, "Self-tuning algorithms for high-performance bandpass switched-capacitor ∑Δ modulators," IEEE Trans. Circuits Syst. I, vol. 51, pp. 170-174, Jan. 2004.
    • (2004) IEEE Trans. Circuits Syst. I , vol.51 , pp. 170-174
    • Gandolfi, G.1    Colonna, V.2    Annovazzi, M.3    Baschirotto, A.4    Stefani, F.5
  • 18
    • 0026399656 scopus 로고
    • Design of a 15-MHz CMOS continuous-time filter with on-chip tuning
    • Dec.
    • J. M. Khoury, "Design of a 15-MHz CMOS continuous-time filter with on-chip tuning," IEEE J. Solid-State Circuits, pp. 1988-1997, Dec 1991.
    • (1991) IEEE J. Solid-state Circuits , pp. 1988-1997
    • Khoury, J.M.1
  • 19
    • 84869403838 scopus 로고
    • Design and performance of a fully integrated bipolar 10.7-MHz analog bandpass filter
    • Feb.
    • C.-F. Chiou and R. Schaumann, "Design and performance of a fully integrated bipolar 10.7-MHz analog bandpass filter," IEEE J. Solid-State Circuits, vol. 21, pp. 6-14, Feb. 1986.
    • (1986) IEEE J. Solid-state Circuits , vol.21 , pp. 6-14
    • Chiou, C.-F.1    Schaumann, R.2
  • 20
    • 0021598441 scopus 로고
    • A ratio-independent algorithmic analog-to-digital conversion technique
    • Dec.
    • P. W. Li, M. J. Chin, P. R. Gray, and R. Castello, "A ratio-independent algorithmic analog-to-digital conversion technique," IEEE J. Solid-State Circuits, pp. 828-836, Dec 1984.
    • (1984) IEEE J. Solid-state Circuits , pp. 828-836
    • Li, P.W.1    Chin, M.J.2    Gray, P.R.3    Castello, R.4
  • 21
    • 0025568946 scopus 로고
    • A fast-settling CMOS op amp for SC circuits with 90-dB DC gain
    • Dec.
    • K. Bult and G. J. G. M. Geelen, "A fast-settling CMOS op amp for SC circuits with 90-dB DC gain," IEEE J. Solid-State Circuits, vol. 25, pp. 1379-1384, Dec. 1990.
    • (1990) IEEE J. Solid-state Circuits , vol.25 , pp. 1379-1384
    • Bult, K.1    Geelen, G.J.G.M.2
  • 22
    • 0031075503 scopus 로고    scopus 로고
    • A fully differential comparator using a switched-capacitor differencing circuit with common-mode rejection
    • Feb.
    • T. Shih, L. Der, S. H. Lewis, and P. Hurst, "A fully differential comparator using a switched-capacitor differencing circuit with common-mode rejection,"IEEE J. Solid-State Circuits, vol. 32, pp. 250-253, Feb. 1997.
    • (1997) IEEE J. Solid-state Circuits , vol.32 , pp. 250-253
    • Shih, T.1    Der, L.2    Lewis, S.H.3    Hurst, P.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.