A CMOS delta-sigma true RMS converter

IEEE Journal of Solid-State Circuits

Volumn 35, Issue 2, 2000, Pages 248-257

  Wey, Wei Shinn ^a   Huang, Yu Chung ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

CMOS analog integrated circuits; Delta sigma modulation; Indirect charge transfer filter; Multiplier divider; rms to dc converter; Switched capacitor circuits; True rms converter

Indexed keywords

CAPACITORS; DELTA SIGMA MODULATION; INTEGRATED CIRCUIT LAYOUT; LINEAR INTEGRATED CIRCUITS; MICROPROCESSOR CHIPS; SIGNAL TO NOISE RATIO;

INDIRECT CHARGE TRANSFER FILTERS; SWITCHED CAPACITOR CIRCUITS;

CMOS INTEGRATED CIRCUITS;

EID: 0033880281     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.823450     Document Type: Article

References (24)

1. A. W. van Herwaarden, H. P. Hochstenbach, and K. J. P. M. Harmans, "Integrated true RMS converter," IEEE Trans. Instrum. Meas., vol. IM-35, pp. 224-225, June 1986.
2. B. P. van Drieenhuizen and R. F. Wolffenbuttel, "Integrated micromachined electrostatic true rms-to-dc converter," IEEE Trans. Instrum. Meas., vol. 44, pp. 370-373, Apr. 1995.
3. B. Gilbert and L. W. Counts, "A monolithic RMS-DC converter with crest factor compensation," in ISSCC Dig. Tech. Papers, Feb. 1976, pp. 110-111.
4. R. F. Wassenaar, E. Seevinck, M. G. van Leeuwen, C. J. Speelman, and E. Holle, "New techniques for high-frequency RMS-to-DC conversion based on a multifunctional V-to-I converter," IEEE J. Solid-State Circuits, vol. 23, pp. 802-815, June 1988.
5. J. Mulder, A. C. van der Woerd, W. A. Serdijn, and A. H. M. van Roermund, "An RMS-DC converter based on the dynamic translinear principle," IEEE J. Solid-Sate Circuits, vol. 32, pp. 1146-1150, July 1997.
6. B. Clark, M. Fazio, and D. Scoot, "RMS-to-DC converters ease measurement tasks," Analog Devices, Application Note AN-268, 1990.
7. E. J. van der Zwan, R. H. M. van Veldhoven, P. A. C. M. Nuijten, E. C. Dijkmans, and S. D. Swift, "A 13 mW500 kHz data acquisition IC with 4.5 digital dc and 0.02% accurate true-rms extraction," in ISSCC Dig. Tech. Papers, Feb. 1999, pp. 398-399.
8. W. S. Wey and Y. C. Huang, "A delta-sigma true rms-to-dc converter using an indirect-charge-transfer filter," in VLSI Circuits Dig. Tech. Papers, June 1999, pp. 93-94.
9. J. C. Candy, "A use of double integration in sigma delta modulation," IEEE Trans. Commun., vol. C-33, pp. 249-258, Mar. 1985.
10. R. M. Gray, "Oversampled sigma-delta modulation," IEEE Trans. Commun., vol. C-35, pp. 481-489, May 1987.
11. J. C. Candy, "Oversampling methods for A/D and D/A conversion," in Over sampling Delta-Sigma Data Converters. New York: IEEE Press, 1992, pp. 1-25.
12. K. C. Hsieh, P. R. Gray, D. Senderowicz, and D. G. Messerschmitt, "A low-noise chopper-stabilized differential switched-capacitor filtering technique," IEEE J. Solid-State Circuits, vol. SC-20, pp. 1122-1132, Dec. 1985.
13. D. McCartney, A. Sherry, J. O'Dowd, and P. Hickey, "A low-noise low-drift transducer ADC," IEEE J. Solid-State Circuits, vol. 32, pp. 959-967, July 1997.
14. C. C. Enz and G. C. Temes, "Circuit techniques for reducing the effects of op-amp imperfections: Autozeroing, correlated double sampling, and chopper stabilization," Proc. IEEE, vol. 84, pp. 1584-1614, Nov. 1996.
15. F. O. Eynde and W. Sansen, "The practical implementation of sigma-delta D-to-A converters," in Analog Interfaces for Digital Signal Processing Systems. Norwell, MA: Kluwer Academic, 1993, ch. 5, pp. 217-248.
16. P. Ju, K. Suyama, P. F. Ferguson, Jr., and W. Lee, "A 22-kHz multibit switched-capacitor sigma-delta D/A converter with 92 dB dynamic range," IEEE J. Solid-State Circuits, vol. 30, pp. 1316-1325, Dec. 1995.
17. K. Nagaraj, "A parasitic-insensitive area-efficient switched-capacitor circuits," IEEE Trans. Circuits Syst., vol. CAS-36, pp. 1210-1216, Sept. 1989.
18. W. H. Ki and G. C. Temes, "Offset-compensated switched-capacitor integrators," in Proc. IEEE Int. Symp. Circuits and Systems, May 1990, pp. 2829-2832.
19. W. S. Wey and Y. C. Huang, "A CMOS rms-to-dc converter using a ΔΣ multipler-divider," in Proc. IEEE Int. Symp. Circuits and Systems, vol. II, May 1999, pp. 256-258.
20. B. M. J. Kup, E. C. Dijkmans, P. J. A. Naus, and J. Sneep, "A bit-stream digital-to-analog converter with 18-b resolution," IEEE J. Solid-State Circuits, vol. 26, pp. 1757-1763, Dec. 1991.
21. J. L. McCreary, "Matching properties, and voltage and temperature dependence of MOS capacitors," IEEE J. Solid-State Circuits, vol. SC-16, pp. 608-616, Dec. 1981.
22. R. Castello and P. R. Gray, "A high-performance micropower switched-capacitor filter," IEEE J. Solid-State Circuits, vol. 20, pp. 1122-1132, Dec. 1995.
23. P. W. Li, M. J. Chin, P. R. Gray, and R. Castello, "A ratio-independent algorithm analog-to-digital conversion technique," IEEE J. Solid-State Circuits, vol. SC-19, pp. 826-836, Dec. 1984.
24. P. R. Gray and R. G. Meyer, "MOS operational amplifier design - A tutorial overview," IEEE J. Solid-State Circuits, vol. SC-17, pp. 969-982, Dec. 1982.