A 21-mW 8-b 125-MSample/s ADC in 0.09-mm2 0.13-μm CMOS

IEEE Journal of Solid-State Circuits

Volumn 39, Issue 12, 2004, Pages 2116-2125

  Mulder, Jan ^a   Ward, Christopher M ^a   Lin, Chi Hung ^a   Kruse, David ^a   Westra, Jan R ^a   Lugthart, Marcel ^a   Arslan, Erol ^a   Van De Plassche, Rudy J ^a   Bult, Klaas ^a   Van Der Goes, Frank M L ^a  

^a Broadcom   (Netherlands)

Author keywords

Analog to digital conversion; CMOS analog integrated circuits (ICs); Subranging analog to digital converter (ADC)

Indexed keywords

ANALOG TO DIGITAL CONVERSION; BANDWIDTH; ELECTRIC POTENTIAL; INTERPOLATION; MATRIX ALGEBRA; SAMPLING;

CLOCK PHASES; CMOS ANALOG INTEGRATED CIRCUITS (IC); LOW-THRESHOLD DEVICES; SUBRANGING ANALOG-TO-DIGITAL CONVERTER (ADC);

CMOS INTEGRATED CIRCUITS;

EID: 10444278085     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2004.836235     Document Type: Conference Paper

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