A 1.5-V 12-bit power-efficient continuous-time third-order ΣΔ modulator

IEEE Journal of Solid-State Circuits

Volumn 38, Issue 8, 2003, Pages 1343-1352

  Gerfers, Friedel ^a,b   Ortmanns, Maurits ^a   Manoli, Yiannos ^a  

^a UNIVERSITY OF FREIBURG   (Germany)

^b SP3D Chip Design GmbH   (Germany)

Author keywords

Analog digital conversion; Circuit nonidealities; Continuous time filters; Low pass filters; Low power design; Low voltage design; Sigma delta modulation

Indexed keywords

ANALOG TO DIGITAL CONVERSION; BANDWIDTH; DELTA SIGMA MODULATION; LOW PASS FILTERS; OPTIMIZATION; SIGNAL TO NOISE RATIO; THRESHOLD VOLTAGE;

LOW-POWER DESIGN;

MODULATORS;

EID: 0042697093     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2003.814432     Document Type: Article

References (21)

1. E. J. van der Zwan and E. C. Dijkmans, "A 0.2-mW CMOS ΣΔ modulator for speech coding with 80 dB dynamic range," IEEE J. Solid-State Circuits, vol. 31, pp. 1873-1880, Dec. 1996.
2. M. Steyaert, V. Peluso, J. Bastos, P. Kinget, and W. Sansen, "Custom analog low power design: The problem of low voltage and mismatch," in Proc. IEEE Custom Integrated Circuits Conf., 1997, pp. 285-292.
3. F. Gerfers, M. Ortmanns, and Y. Manoli, "A design strategy for low-voltage low-power continuous-time ΣΔ A/D converters," in Proc. Design, Automation and Test Conf., 2001, pp. 361-368.
4. O. Shoaei, "Continuous-time delta-sigma A/D converters for high speed applications," Ph.D. dissertation, Carleton Univ., Ottawa, ON, Canada, 1995.
5. J. A. Cherry and W. M. Snelgrove, Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion, Boston, MA: Kluwer, 1999.
6. G. Fischer and A. J. Davis, "Alternative topologies for sigma-delta modulators: A comparative study," IEEE Trans. Circuits Syst. II, vol. 44, pp. 789-797, Oct. 1997.
7. F. Gerfers, K. M. Soh, M. Ortmanns, and Y. Manoli, "Figure of merit based design strategy for low-power continuous-time ΣΔ modulators," in Proc. IEEE Int. Symp. Circuits and Systems, 2001, pp. 233-236.
8. F. Gerfers, M. Ortmanns, L. Samid, and Y. Manoli, "Implementaion of a 1.5 V low-power clock-jitter insensitive continuous-time ΣΔ modulator," in Proc. IEEE Int. Symp. Circuits and Systems, 2002, pp. 652-655.
9. S. Northworthy, R. Schreier, and G. Temes, Delta-Sigma Data Converters. Piscataway, NJ: IEEE Press, 1997.
10. F. Medeiro, B. Perez-Verdu, and A. Rodriguez-Vazquez, Top-Down Design of High-Performance Sigma-Delta Modulators. Boston, MA: Kluwer, 1999.
11. A. Marques, V. Peluso, M. S. Steyaert, and W. M. Sansen, "Optimal parameters for ΔΣ modulator topologies," IEEE Trans. Circuits Syst. II, vol. 45, pp. 1232-1241, Sept. 1998.
12. N. Wongkomet and B. E. Boser, "An analysis of continuous-time sigma-delta modulators," in Proc. 21st Electrical Engineering Conf., 1998.
13. "Embeddable Data Converters for Mixed-Signal ASICs," EUROPRACTICE Analog Thematic Training & ESPRIT Mixed-Signal Design Cluster, July 1999.
14. m-C-OTA filter," IEEE J. Solid-State Circuits, vol. 47, pp. 89-95, Feb. 2000.
15. R.Reimund Wittman, W.Werner Schardein, B. J.Bedrich J. Hosticka, G.Gert Burbach, and J.Juergen Arndt, "Trimless high precision ratioed resistors in D/A and A/D converters," IEEE J. Solid-State Circuits, vol. 30, pp. 935-939, Aug. 1995.
16. V. Peluso, P. Vancorenland, A. Marques, M. S. Steyaert, and W. M. Sansen, "A 900-mV low-power ΣΔ A/D converter with 77-dB dynamic range," IEEE J. Solid-State Circuits, vol. 33, pp. 1887-1897, Dec. 1998.
17. H. Tao, L. Toth, and J. M. Khoury, "Analysis of timing jitter in bandpass sigma-delta modulators," IEEE Trans. Circuits Syst. II, vol. 46, pp. 991-1001, Aug. 1999.
18. F. Henkel, U. Langmann, A. Hanke, S. Heinen, and E. Wagner, "A 1-MHz-bandwidth second-order continuous-time quadrature bandpass sigma-delta modulator for low-IF radio receivers," in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, vol. 45, 2002, pp. 214-215.
19. L. Risbo, "ΣΔ modulators - Stability and design optimization," Ph.D. dissertation, Tech. Univ. Denmark, Lyngby, 1994.
20. F. Gerfers, M. Ortmanns, and Y. Manoli, "A 12-bit power efficient continuous-time ΣΔ modulator with 220 μW power consumption," in Proc. Eur. Solid-State Circuits Conf. (ESSCIRC), 2001, pp. 536-539.
21. T. B. Cho and P. R. Gray, "A 10-b 20-Msample/s 35-mW pipeline A/D converter," IEEE J. Solid-State Circuits, vol. 30, no. 3, pp. 166-172, Mar. 1995.