3.3-V single-poly CMOS audio ADC delta-sigma modulator with 98-dB peak SINAD and 105-dB peak SFDR

IEEE Journal of Solid-State Circuits

Volumn 35, Issue 3, 2000, Pages 297-307

  Fogleman, Eric ^a   Galton, Ian ^a   Huff, William ^b,c   Jensen, Henrik ^b,d  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c Analog Circuit Technologies   (United States)

^d Hughes Aircraft Co   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DELTA SIGMA MODULATION; DIGITAL INTEGRATED CIRCUITS; DIGITAL TO ANALOG CONVERSION; OPTIMIZATION; SHIFT REGISTERS; SIGNAL DISTORTION; SIGNAL TO NOISE RATIO;

SECOND-ORDER DELTA-SIGMA MODULATORS; SIGNAL-TO-NOISE-AND-DISTORTION (SINAD) RATIO; SPURIOUS-FREE DYNAMIC RANGE (SFDR);

MODULATORS;

EID: 0033886802     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.826811     Document Type: Article

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