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Volumn 11, Issue , 2010, Pages 1-263

Transactional memory, 2nd edition

Author keywords

cache coherence; compilers; computer architecture; computer hardware; concurrent programming; lock free data structures; nonblocking algorithms; parallel programming; programming languages; synchronization; transactional memory

Indexed keywords

CACHE COHERENCE; COMPILERS; CONCURRENT PROGRAMMING; LOCK-FREE DATA STRUCTURES; NONBLOCKING ALGORITHMS; PROGRAMMING LANGUAGE; TRANSACTIONAL MEMORY;

EID: 77954898633     PISSN: 19353235     EISSN: 19353243     Source Type: Book Series    
DOI: 10.2200/S00272ED1V01Y201006CAC011     Document Type: Conference Paper
Times cited : (58)

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