-
2
-
-
28444494370
-
Unbounded transactional memory
-
February
-
C. S. Ananian, K. Asanovic, B. C. Kuszmaul, C. E. Leiserson, and S. Lie. Unbounded Transactional Memory. In Proceedings of the Eleventh International Symposium on High-Performance Computer Architecture, February 2005.
-
(2005)
Proceedings of the Eleventh International Symposium on High-performance Computer Architecture
-
-
Ananian, C.S.1
Asanovic, K.2
Kuszmaul, B.C.3
Leiserson, C.E.4
Lie, S.5
-
3
-
-
0014814325
-
Space/time trade-offs in hash coding with allowable errors
-
B. H. Bloom. Space/Time Trade-Offs in Hash Coding with Allowable Errors. Communications of the ACM, 13(7), 1970.
-
(1970)
Communications of the ACM
, vol.13
, Issue.7
-
-
Bloom, B.H.1
-
5
-
-
0017018483
-
The notions of consistency and predicate locks in a database system
-
November
-
K. P. Eswaran, J. Gray, R. A. Lorie, and I. L. Traiger. The Notions of Consistency and Predicate Locks in a Database System. Communications of the ACM, 19(11), November 1976.
-
(1976)
Communications of the ACM
, vol.19
, Issue.11
-
-
Eswaran, K.P.1
Gray, J.2
Lorie, R.A.3
Traiger, I.L.4
-
6
-
-
0034206002
-
Summary cache: A scalable wide-area web cache sharing protocol
-
L. Fan, P. Cao, J. Almeida, and A. Z. Broder. Summary Cache: A Scalable Wide-Area Web Cache Sharing Protocol. IEEE/ACM Transactions on Networks, 8(3), 2000.
-
(2000)
IEEE/ACM Transactions on Networks
, vol.8
, Issue.3
-
-
Fan, L.1
Cao, P.2
Almeida, J.3
Broder, A.Z.4
-
7
-
-
4644359934
-
Transactional memory coherence and consistency
-
June
-
L. Hammond, V. Wong, M. Chen, B. D. Carlstrom, J. D. Davis, B. Hertzberg, M. K. Prabhu, H. Wijaya, C. Kozyrakis, and K. Olukotun. Transactional Memory Coherence and Consistency. In Proceedings of the 31st Annual International Symposium on Computer Architecture, June 2004.
-
(2004)
Proceedings of the 31st Annual International Symposium on Computer Architecture
-
-
Hammond, L.1
Wong, V.2
Chen, M.3
Carlstrom, B.D.4
Davis, J.D.5
Hertzberg, B.6
Prabhu, M.K.7
Wijaya, H.8
Kozyrakis, C.9
Olukotun, K.10
-
11
-
-
0004177551
-
A new approach to exclusive data access in shared memory multiprocessors
-
Lawrence Livermore National Laboratory, November
-
E. H. Jensen, G. W. Hagensen, and J. M. Broughton, A New Approach to Exclusive Data Access in Shared Memory Multiprocessors. Lawrence Livermore National Laboratory, Technical Report UCRL-97663, November 1987.
-
(1987)
Technical Report
, vol.UCRL-97663
-
-
Jensen, E.H.1
Hagensen, G.W.2
Broughton, J.M.3
-
12
-
-
0003741558
-
One-level storage system
-
April
-
T. Kilburn, D. B. J. Edwards, M. J. Lanigan, and F. H. Sumner. One-Level Storage System. IRE Trans. Electronic Computers, 11(2), April 1962.
-
(1962)
IRE Trans. Electronic Computers
, vol.11
, Issue.2
-
-
Kilburn, T.1
Edwards, D.B.J.2
Lanigan, M.J.3
Sumner, F.H.4
-
14
-
-
0017555081
-
Concurrent reading and writing
-
November
-
L. Lamport. Concurrent Reading and Writing. Communications of the ACM, 20(11), November 1977.
-
(1977)
Communications of the ACM
, vol.20
, Issue.11
-
-
Lamport, L.1
-
16
-
-
0035694663
-
Correctly implementing value prediction in microprocessors that support multithreading or multiprocessing
-
December
-
M. M. K. Martin, D. J. Sorin, H. W. Cain, M. D. Hill, and M. H. Lipasti. Correctly Implementing Value Prediction in Microprocessors That Support Multithreading or Multiprocessing. In Proceedings of the 34th International Symposium on Microarchitecture, December 2001.
-
(2001)
Proceedings of the 34th International Symposium on Microarchitecture
-
-
Martin, M.M.K.1
Sorin, D.J.2
Cain, H.W.3
Hill, M.D.4
Lipasti, M.H.5
-
17
-
-
27544444332
-
Thread-level transactional memory
-
October
-
K. E. Moore, Thread-Level Transactional Memory, presented at Wisconsin Industrial Affiliates Meeting, October 2004 http://www.cs.wisc.edu/multifacet/ papers/affiliates04_tltm.pdf
-
(2004)
Wisconsin Industrial Affiliates Meeting
-
-
Moore, K.E.1
-
21
-
-
0024752323
-
Practical performance of bloom filters and parallel free-text searching
-
M. V. Ramakrishna. Practical Performance of Bloom Filters and Parallel Free-Text Searching. Communications of the ACM, 32(10), 1989.
-
(1989)
Communications of the ACM
, vol.32
, Issue.10
-
-
Ramakrishna, M.V.1
-
22
-
-
0028377578
-
Lightweight recoverable virtual memory
-
M. Satyanarayanan, H. H. Mashburn, P. Kumar, D. C. Steere, and J. J. Kistler. Lightweight Recoverable Virtual Memory. ACM Transactions on Computer Systems, 12(1), 1994.
-
(1994)
ACM Transactions on Computer Systems
, vol.12
, Issue.1
-
-
Satyanarayanan, M.1
Mashburn, H.H.2
Kumar, P.3
Steere, D.C.4
Kistler, J.J.5
-
23
-
-
84944387421
-
Scalable hardware memory disambiguation for high ILP processors
-
December
-
S. Sethumadhavan, R. Desikan, D. Burger, C. R. Moore, and S. W. Keckler. Scalable Hardware Memory Disambiguation for High ILP Processors. In Proceedings of the 36th International Symposium on Microarchitecture, December 2003.
-
(2003)
Proceedings of the 36th International Symposium on Microarchitecture
-
-
Sethumadhavan, S.1
Desikan, R.2
Burger, D.3
Moore, C.R.4
Keckler, S.W.5
-
26
-
-
0027702976
-
Multiple reservations and the oklahoma update
-
November
-
J. M. Stone, H. S. Stone, P. Heidelberger, and J. Turek. Multiple Reservations and the Oklahoma Update. IEEE Parallel & Distributed Technology, 1(4), November 1993.
-
(1993)
IEEE Parallel & Distributed Technology
, vol.1
, Issue.4
-
-
Stone, J.M.1
Stone, H.S.2
Heidelberger, P.3
Turek, J.4
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