Automatic data partitioning in software transactional memories

Annual ACM Symposium on Parallelism in Algorithms and Architectures

Volumn , Issue , 2008, Pages 152-159

  Riegel, Torvald ^a   Fetzer, Christof ^a   Felber, Pascal ^b  

^a DRESDEN UNIVERSITY OF TECHNOLOGY   (Germany)

^b UNIVERSITY OF NEUCHÂTEL   (Switzerland)

Author keywords

Algorithms; Performance

Indexed keywords

BENCHMARKING; DATA STORAGE EQUIPMENT; FILE ORGANIZATION; PARALLEL PROCESSING SYSTEMS; STORAGE ALLOCATION (COMPUTER); TUNING;

ACCESS PATTERNS; DATA PARTITIONING; DATA PARTITIONS; DYNAMIC TUNING; PERFORMANCE; PERFORMANCE IMPROVEMENTS; RUNTIME OVERHEADS; SOFTWARE TRANSACTIONAL MEMORIES; TRANSACTIONAL MEMORIES;

DATA STRUCTURES;

EID: 57349083101     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1378533.1378562     Document Type: Conference Paper

References (14)

1. T. Bai, X. Shen, C. Zhang, W. N. Scherer III, C. Ding, and M. L. Scott. A key-based adaptive transactional memory executor. Technical Report TR 909, Computer Science Department, University of Rochester, Dec. 2006.
2. Cheng Wang, Wei-Yu Chen, Youfeng Wu, Bratin Saha, and Ali-Reza Adl Tabatabai. Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language. In International Symposium on Code Generation and Optimization (CGO), 2007.
3. Chi Cao Minh, Martin Trautmann, JaeWoong Chung, Austen McDonald, Nathan Bronson, Jared Casper, Christos Kozyrakis, and Kunle Olukotun. An Effective Hybrid Transactional Memory System with Strong Isolation Guarantees. In 34th Intl. Symposium, on Computer Architecture (ISCA), 2007.
4. Chris Lattner. Macroscopic Data Structure Analysis and Optimization. PhD thesis, Computer Science Dept., University of Illinois at Urbana-Champaign, Urbana, IL, May 2005. See http://llvm.cs.uiuc.edu.
5. Chris Lattner and Vikram Adve. LLVM: A Compilation Framework for Lifelong Program Analysis & Transformation. In CGO '04: Proceedings of the international symposium on Code generation and optimization, page 75, Washington, DC, USA, 2004. IEEE Computer Society.
6. Chris Lattner and Vikram Adve. Automatic Pool Allocation: Improving Performance by Controlling Data Structure Layout in the Heap. In Proceedings of the 2005 ACM SIGPLAN Conference on Programming Language Design and, Implementation (PLDI'05), Chigago, Illinois, June 2005.
7. David Dice, Ori Shalev, and Nir Shavit. Transactional Locking II. In S. Dolev, editor, DISC, volume 4167 of Lecture Notes in Computer Science, pages 194-208. Springer, 2006.
8. T. Harris and K. Fraser. Language Support for Lightweight Transactions. In Proceedings of OOPSLA, pages 388-402, Oct 2003.
9. Maurice Herlihy, Victor Luchangco, Mark Moir, and William N. Scherer III. Software transactional memory for dynamic-sized data structures. In PODC '03: Proceedings of the twenty-second annual symposium, on Principles of distributed computing, pages 92-101, New York, NY, USA, 2003. ACM Press.
10. Pascal Felber, Christof Fetzer, and Torvald Riegel. Dynamic Performance Tuning of Word-Based Software Transactional Memory. In Proceedings of the 13th ACM SIGPLAN Symposium, on Principles and Practice of Parallel Programming (PPoPP), 2008.
11. Pascal Felber, Christof Fetzer, Ulrich Müller, Torvald Riegel, Martin Süßkraut, and Heiko Sturzrehm. Transactifying Applications using an Open Compiler Framework. In TRANSACT, August 2007.
12. Tatiana Shpeisman, Vijay Menon, Ali-Reza Adl Tabatabai, Steven Balensiefer, Dan Grossman, Richard L. Hudson, Katherine F. Moore, and Bratin Saha. Enforcing isolation and ordering in STM. In PLDI '07: Proceedings of the 2007 ACM SIGPLAN conference on Programming language design and implementation, pages 78-88, New York, NY, USA, 2007. ACM Press.
13. Torvald Riegel, Pascal Felber, and Christof Fetzer. A Lazy Snapshot Algorithm with Eager Validation. In 20th International Symposium on Distributed Computing (DISC), September 2006.
14. C. Zilles and R. Rajwar. Brief Announcement: Transactional Memory and the Birthday Paradox. In 19th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA), June 2007.