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Volumn , Issue , 2009, Pages 171-179

Dynamically filtering thread-local variables in lazy-lazy hardware transactional memory

Author keywords

Dynamic Heap Separation; Hardware Transactional Memory; Translation Lookaside Buffer(TLB); Virtual Memory Management

Indexed keywords

AVERAGE SPEED; BENCHMARK SUITES; CONFLICT DETECTION; DATA VERSIONING; EMERGING TECHNOLOGIES; FULL SYSTEM SIMULATORS; IN-LINE; LINUX KERNEL; LOCAL DATA; LOCAL VARIABLES; OPERATING SYSTEMS; SHARED DATA; SPEED-UPS; TRANSACTIONAL MEMORY; TRANSLATION LOOKASIDE BUFFER(TLB); VERSIONING; VIRTUAL MEMORY MANAGEMENT;

EID: 70449566810     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPCC.2009.84     Document Type: Conference Paper
Times cited : (18)

References (14)
  • 8
    • 0025429331 scopus 로고
    • Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers
    • NP Jouppi. Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers. In Computer Architecture, 1990. Proceedings. 17th Annual International Symposium on, pages 364-373, 1990.
    • (1990) 17th Annual International Symposium on Computer Architecture 1990. Proceedings , pp. 364-373
    • Jouppi, N.P.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.