-
2
-
-
0342321935
-
The Jalapeño virtual machine
-
B. Alpern and other. The Jalapeño virtual machine. IBM Systems Journal, 39(1):211-238, 2000.
-
(2000)
IBM Systems Journal
, vol.39
, Issue.1
, pp. 211-238
-
-
Alpern, B.1
-
4
-
-
0033722744
-
Piranha: A scalable architecture based on single-chip multiprocessing
-
Vancouver, Canada, June
-
L. A. Barroso et al. Piranha: A scalable architecture based on single-chip multiprocessing. In Proc. of the 27th Annual Intl. Symp. on Computer Architecture, Vancouver, Canada, June 2000.
-
(2000)
Proc. of the 27th Annual Intl. Symp. on Computer Architecture
-
-
Barroso, L.A.1
-
5
-
-
84858088574
-
-
CEARCH Kernels, http://cearch.east.isi.edu/.
-
CEARCH Kernels
-
-
-
6
-
-
33845866604
-
Bulk disambiguation of speculative threads in multiprocessors
-
L. Ceze, J. Tuck, J. Torrellas, and C. Cascaval. Bulk disambiguation of speculative threads in multiprocessors. In ISCA '06: Proc. of the 33rd Intl. Symp. on Computer Architecture, pages 227-238, 2006.
-
(2006)
ISCA '06: Proc. of the 33rd Intl. Symp. on Computer Architecture
, pp. 227-238
-
-
Ceze, L.1
Tuck, J.2
Torrellas, J.3
Cascaval, C.4
-
16
-
-
1442263994
-
Language support for lightweight transactions
-
T. Harris and K. Fraser. Language support for lightweight transactions. In OOPSLA '03: Proc. of the 18th annual ACM SIGPLAN Conf. on Object-oriented programing, systems, languages, and applications, pages 388-402, 2003.
-
(2003)
OOPSLA '03: Proc. of the 18th annual ACM SIGPLAN Conf. on Object-oriented programing, systems, languages, and applications
, pp. 388-402
-
-
Harris, T.1
Fraser, K.2
-
18
-
-
84949104911
-
-
Infiniband Trade Association
-
Infiniband Trade Association, InfiniBand. http://www.infinibandta. org/.
-
InfiniBand
-
-
-
23
-
-
0026839484
-
The stanford dash multiprocessor
-
D. Lenoski et al. The stanford dash multiprocessor. Computer, 25(3):63-79, 1992.
-
(1992)
Computer
, vol.25
, Issue.3
, pp. 63-79
-
-
Lenoski, D.1
-
27
-
-
33748873605
-
LogTM: Log-Based Transactional Memory
-
February
-
K. E. Moore, J. Bobba, M. J. Moravan, M. D. Hill, and D. A. Wood. LogTM: Log-Based Transactional Memory. In 12th Intl. Conf. on High-Performance Computer Architecture, February 2006.
-
(2006)
12th Intl. Conf. on High-Performance Computer Architecture
-
-
Moore, K.E.1
Bobba, J.2
Moravan, M.J.3
Hill, M.D.4
Wood, D.A.5
-
28
-
-
0034852757
-
Removing architectural bottlenecks to the scalability of speculative parallelization
-
M. Prvulovic et al. Removing architectural bottlenecks to the scalability of speculative parallelization. In Proc. of the 28th Intl. Symp. on Computer architecture, 2001.
-
(2001)
Proc. of the 28th Intl. Symp. on Computer architecture
-
-
Prvulovic, M.1
-
34
-
-
33746711021
-
-
Standard Performance Evaluation Corporation
-
Standard Performance Evaluation Corporation, SPEC CPU Benchmarks. http://www.specbench.org/,1995-2000.
-
(1995)
SPEC CPU Benchmarks
-
-
-
35
-
-
21644489816
-
-
Standard Performance Evaluation Corporation
-
Standard Performance Evaluation Corporation, SPECjbb2000 Benchmark. http://www.spec.org/jbb2000/, 2000.
-
(2000)
SPECjbb2000 Benchmark
-
-
-
38
-
-
0027702976
-
Multiple Reservations and the Oklahoma Update
-
58-71, November
-
J. M. Stone, H. S. Stone, P. Heidelberger, and J. Turek. Multiple Reservations and the Oklahoma Update. IEEE Parallel and Distributed Technology, 01(4):58-71, November 1993.
-
(1993)
IEEE Parallel and Distributed Technology
, vol.1
, Issue.4
-
-
Stone, J.M.1
Stone, H.S.2
Heidelberger, P.3
Turek, J.4
-
39
-
-
0029179077
-
The SPLASH2 Programs: Characterization and Methodological Considerations
-
June
-
S. C. Woo et al. The SPLASH2 Programs: Characterization and Methodological Considerations. In Proc. of the 22nd Intl. Symp. on Computer Architecture, pages 24-36, June 1995.
-
(1995)
Proc. of the 22nd Intl. Symp. on Computer Architecture
, pp. 24-36
-
-
Woo, S.C.1
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