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Volumn , Issue , 2007, Pages 210-220

Nonblocking transactions without indirection using alert-on-update

Author keywords

Event based systems; Obstruction freedom; Software transactional memory

Indexed keywords

EVENT-BASED SYSTEMS; LOAD VALIDATION; NONBLOCKING TRANSACTIONS; OBSTRUCTION FREEDOM; SOFTWARE TRANSACTIONAL MEMORY;

EID: 35248816454     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1248377.1248414     Document Type: Conference Paper
Times cited : (15)

References (25)
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    • Software Transactional. Memory Should Not Be Lock Free
    • Technical Report IRC-TR-06-052, Intel Research Cambridge
    • R. Ennals. Software Transactional. Memory Should Not Be Lock Free. Technical Report IRC-TR-06-052, Intel Research Cambridge, 2006.
    • (2006)
    • Ennals, R.1
  • 5
    • 33646401962 scopus 로고    scopus 로고
    • Submitted for publication, Available as
    • K. Fraser and T. Harris. Concurrent Programming Without Locks. Submitted for publication, 2004. Available as research.microsoft.com/~tharris/drafts/cpwl- submission.pdf.
    • (2004) Concurrent Programming Without Locks
    • Fraser, K.1    Harris, T.2
  • 13
    • 35248820892 scopus 로고    scopus 로고
    • V. J. Marathe, M. F. Spear, C. Heriot, A. Acharya, D. Eisenstat, W. N. Scherer III, and M. L. Scott. Lowering the Overhead of Software Transactional Memory. In ACM SIGPLAN Workshop on Transactional Computing, Ottawa, ON, Canada, June 2006. Expanded version available as TR 893, Dept. of Computer Science, Univ. of Rochester, Mar. 2006.
    • V. J. Marathe, M. F. Spear, C. Heriot, A. Acharya, D. Eisenstat, W. N. Scherer III, and M. L. Scott. Lowering the Overhead of Software Transactional Memory. In ACM SIGPLAN Workshop on Transactional Computing, Ottawa, ON, Canada, June 2006. Expanded version available as TR 893, Dept. of Computer Science, Univ. of Rochester, Mar. 2006.
  • 20
    • 57349190665 scopus 로고    scopus 로고
    • Sequential Specification of Transactional Memory Semantics
    • Ottawa, ON, Canada, June
    • M. L. Scott. Sequential Specification of Transactional Memory Semantics. In ACM SIGPLAN Workshop on Transactional Computing, Ottawa, ON, Canada, June 2006.
    • (2006) ACM SIGPLAN Workshop on Transactional Computing
    • Scott, M.L.1
  • 21
    • 35248891757 scopus 로고    scopus 로고
    • A. Shriraman, V. J. Marathe, S. Dwarkadas, M. L. Scott, D. Eisenstat, C. Heriot, W. N. Scherer III, and M. F. Spear. Hardware Acceleration of Software Transactional Memory. In ACM SIGPLAN Workshop on Transactional Computing, Ottawa, ON, Canada, June 2006. Expanded version available as TR 887, Dept. of Computer Science, Univ. of Rochester, Dec. 2005, revised Mar. 2006.
    • A. Shriraman, V. J. Marathe, S. Dwarkadas, M. L. Scott, D. Eisenstat, C. Heriot, W. N. Scherer III, and M. F. Spear. Hardware Acceleration of Software Transactional Memory. In ACM SIGPLAN Workshop on Transactional Computing, Ottawa, ON, Canada, June 2006. Expanded version available as TR 887, Dept. of Computer Science, Univ. of Rochester, Dec. 2005, revised Mar. 2006.
  • 25
    • 84858349251 scopus 로고    scopus 로고
    • The Rochester Software Transactional
    • The Rochester Software Transactional. Memory Runtime. 2006. www.cs.rochester.edu/research/synchronization/rstm/.
    • (2006) Memory Runtime


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.