An analysis of I/O and syscalls in critical sections and their implications for transactional memory

ISPASS 2008 - IEEE International Symposium on Performance Analysis of Systems and Software

Volumn , Issue , 2008, Pages 54-62

  Baugh, Lee ^a   Zilles, Craig ^a  

^a University of Illinois at Urbana Champaign   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

TECHNICAL PRESENTATIONS;

CRITICAL SECTIONS; INTERNATIONAL SYMPOSIUM; LONG-LASTING; PERFORMANCE ANALYSES; SHARED-MEMORY PROGRAMS; SYSTEM CALLS; SYSTEMS-AND-SOFTWARE; TRANSACTIONAL MEMORIES; TRANSACTIONAL MEMORY;

STORAGE ALLOCATION (COMPUTER);

EID: 52249108484     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPASS.2008.4510738     Document Type: Conference Paper

References (21)

1. Sysbench: a system performance benchmark.
2. C. S. Ananian, K. Asanović, B. C. Kuszmaul, C. E. Leiserson, and S. Lie. Unbounded Transactional Memory. In Proceedings of HPCA-XI, Feb. 2005.
3. C. Blundell, E. C. Lewis, , and M. M. K. Martin. Unrestricted transactional memory: Supporting i/o and system calls within transactions. Technical Report CIS-06-09, Department of Computer and Information Science, University of Pennsylvania, Philadelphia, PA, July 2006.
4. J. Chung, H. Chafi, A. McDonald, C. C. Minh, B. D. Carlstrom, C. Kozyrakis, and K. Olukotun. The common case transactional behavior of multithreaded programs. In Proceedings of HPCA-XII, Feb. 2006.
5. J. Gray and A. Reuter. Transaction Processing: Concepts and Techniques. Morgan Kaufmann, 1993.
6. L. Hammond, V. Wong, M. Chen, B. D. Carlstrom, J. D. Davis, B. Hertzberg, M. K. Prabhu, H. Wijaya, C. Kozyrakis, and K. Olukotun. Transactional Memory Coherence and Consistency. In ISCA-31, pages 102-113, June 2004.
7. T. Harris. Exceptions and side-effects in atomic blocks. Sei. Comput. Program., 58(3):325-343, 2005.
8. T. Harris, S. Marlow, S. Peyton-Jones, and M. Herlihy. Composable Memory Transactions. In Principles and Practice of Parallel Programming (PPOPP), 2005.
9. M. Herlihy, V. Luchangco, M. Moir, and W. N. S. III. Software Transactional Memory for Dynamic-Sized Data Structures. In Proceedings of the Twenty-Second Symposium on Principles of Distributed Computing (PODC), 2003.
10. M. Herlihy and J. E. B. Moss. Transactional Memory: Architectural Support for Lock-Free Data Structures. In ISCA-20, pages 289-300, May 1993.
11. J. R. Larus and R. Rajwar. Transactional Memory. Morgan and Claypool, Dec. 2006.
12. C.-K. Luk, R. Cohn, R. Muth, H. Patil, A. Klauser, G. Lowney, S. Wallace, V. J. Reddi, and K. Hazelwood. Pin: Building customized program analysis tools with dynamic instrumentation. In Programming Language Design and Implementation, pages 190-200, Chicago, IL, June 2005.
13. A. McDonald, J. Chung, B. Carlstrom, C. C. Minh, H. Chafi, C. Kozyrakis, and K. Olukotun. Architectural semantics for practical transactional memory. In ISCA-33, June 2006.
14. K. E. Moore, J. Bobba, M. J. Moravan, M. D. Hill, and D. A. Wood. LogTM: Log-based Transactional Memory. In Proceedings of HPCA-XII, Feb. 2006.
15. M. J. Moravan, J. Bobba, K. E. Moore, L. Yen, M. D. Hill, B. Liblit, M. M. Swift, and D. A. Wood. Supporting nested transactional memory in logtm. SIGOPS Oper. Syst. Rev., 40(5):359-370, 2006.
16. J. E. B. Moss and T. Hosking. Nested Transactional Memory: Model and Preliminary Architecture Sketches. In Proceedings of the workshop on Synchronization and Concurrency in Object-Oriented Languages (SCOOL), 2005.
17. J. Nakano, P. Montesinos, K. Gharachorloo, and J. Torrellas. Revivei/o: Efficient handling of i/o in highly-available rollback-recovery servers. In Proceedings of HPCA-XII, Feb. 2006.
18. R. Rajwar, M. Herlihy, and K. Lai. Virtualizing Transactional Memory. In ISCA-32, June 2005.
19. N. Shavit and D. Touitou. Software transactional memory. In Symposium on Principles of Distributed Computing, pages 204-213, 1995.
20. C. Zilles and L. Baugh. Extending Hardware Transactional Memory to Support Non-busy Waiting and Nontransactional Actions. In First ACM SIGPLAN Workshop on Transactional Computing, June 2006.
21. C. Zilles and D. Flint. Challenges to Providing Performance Isolation in Transactional Memories. In Proceedings of the Fourth Workshop on Duplicating, Deconstructing, and Debunking, pages 48-55, June 2005.