Electrical characterization and analysis techniques for the high-κ era

Microelectronics Reliability

Volumn 47, Issue 4-5 SPEC. ISS., 2007, Pages 479-488

  Young, Chadwin D ^a   Heh, Dawei ^a   Neugroschel, Arnost ^b   Choi, Rino ^a   Lee, Byoung Hun ^a   Bersuker, Gennadi ^a  

^a SEMATECH   (United States)

^b UNIVERSITY OF FLORIDA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DIELECTRIC MATERIALS; ELECTRIC CHARGE; ELECTRON TRAPS; GATES (TRANSISTOR); MEASUREMENT THEORY; ROBUST CONTROL;

GATE DIELECTRIC STACK STRUCTURES; INTERFACE TRAPS; SILICON SUBSTRATE;

ELECTRICAL ENGINEERING;

EID: 34247128251     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2007.01.053     Document Type: Article

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