-
2
-
-
0036932324
-
A predictive reliability model for PMOS bias temperature degradation
-
S. Mahapatra and M.A. Alam, "A predictive reliability model for PMOS bias temperature degradation", International Electron Device Meeting, pages 505-508, 2002.
-
(2002)
International Electron Device Meeting
, pp. 505-508
-
-
Mahapatra, S.1
Alam, M.A.2
-
3
-
-
34250741575
-
-
ITRS [SIA, San Jose CA] http://public.itrs.net
-
ITRS [SIA, San Jose CA] http://public.itrs.net
-
-
-
-
4
-
-
0035716168
-
Ultrathin high-K gate stacks for advanced CMOS devices
-
E. P Gusev et al., "Ultrathin high-K gate stacks for advanced CMOS devices", International Electron Device Meeting, page 451, 2001.
-
(2001)
International Electron Device Meeting
, pp. 451
-
-
Gusev, E.P.1
-
5
-
-
0001716170
-
Charge trapping in very thin high-permittivity gate dielectrics layers
-
M. Houssa et al., "Charge trapping in very thin high-permittivity gate dielectrics layers", Applied Physics Letters, vol. 77, p. 1381, 2000.
-
(2000)
Applied Physics Letters
, vol.77
, pp. 1381
-
-
Houssa, M.1
-
6
-
-
0036932011
-
75nm Damascene Metal gate and High-K integration for advanced CMOS devices
-
B. Guillaumot et al., "75nm Damascene Metal gate and High-K integration for advanced CMOS devices", International Electron Device Meeting, pages 355-358, 2002.
-
(2002)
International Electron Device Meeting
, pp. 355-358
-
-
Guillaumot, B.1
-
7
-
-
84907692820
-
Investigation of HfO2 dielectric stacks deposited by ALD using a mercury probe
-
X. Garros et al., "Investigation of HfO2 dielectric stacks deposited by ALD using a mercury probe", Proceedings of ESSDERC, 2002, pages 411-414.
-
(2002)
Proceedings of ESSDERC
, pp. 411-414
-
-
Garros, X.1
-
8
-
-
21644452062
-
Characterization and modelling of hysteresis phenomena in High-K dielectrics
-
C. Leroux, J. Mitard et al., "Characterization and modelling of hysteresis phenomena in High-K dielectrics", International Electron Device Meeting, pages 737-740, 2004.
-
(2004)
International Electron Device Meeting
, pp. 737-740
-
-
Leroux, C.1
Mitard, J.2
-
9
-
-
20444480929
-
2 gate dielectrics and frequency dependence of dynamic BTI in MOSFETs
-
2 gate dielectrics and frequency dependence of dynamic BTI in MOSFETs", International Electron Device Meeting, page 733, 2004.
-
(2004)
International Electron Device Meeting
, pp. 733
-
-
Shen, C.1
-
10
-
-
0037972997
-
Characterization of the VT-instability in SiO2/HfO2 gate dielectrics
-
A. Kerber et al., "Characterization of the VT-instability in SiO2/HfO2 gate dielectrics", Reliability Physics Symposium Proceedings, pages 41-45, 2003.
-
(2003)
Reliability Physics Symposium Proceedings
, pp. 41-45
-
-
Kerber, A.1
-
11
-
-
19944365221
-
Investigation on trapping and detrapping mechanisms in HfO2 films, INFOS
-
J. Mitard et al., "Investigation on trapping and detrapping mechanisms in HfO2 films", INFOS, Microelectronics Engineering, vol. 80c, pages 362-365, 2005
-
(2005)
Microelectronics Engineering
, vol.80 c
, pp. 362-365
-
-
Mitard, J.1
-
14
-
-
34250785816
-
Characterization and modeling of defects in High-K layers through fast electrical transient measurements
-
Springer, Berlin
-
J. Mitard et al., "Characterization and modeling of defects in High-K layers through fast electrical transient measurements", Proceeding of NATO Workshop (Springer, Berlin, 2005)
-
(2005)
Proceeding of NATO Workshop
-
-
Mitard, J.1
-
17
-
-
20444463961
-
2-based high-K dielectrics
-
2-based high-K dielectrics", IEDM Tech. Dig., p.129-132, 2004.
-
(2004)
IEDM Tech. Dig
, pp. 129-132
-
-
Torii, K.1
-
18
-
-
20444483731
-
Validity of constant voltage stress based reliability assessment of high-K devices
-
B. H. Lee et al., "Validity of constant voltage stress based reliability assessment of high-K devices", IEEE transactions on devices and materials reliability, vol 5., no1, 2005.
-
(2005)
IEEE transactions on devices and materials reliability
, vol.5
, Issue.NO1
-
-
Lee, B.H.1
-
19
-
-
26444468109
-
Mechanism of positive bias temperature instability in sub-1-nm TaN/HfN/HfO2 gate stack with low preexisting traps
-
September
-
N. Sa et al., "Mechanism of positive bias temperature instability in sub-1-nm TaN/HfN/HfO2 gate stack with low preexisting traps", IEEE Electron Devices Letters, vol. 26, no9, September 2005.
-
(2005)
IEEE Electron Devices Letters
, vol.26
, Issue.NO9
-
-
Sa, N.1
-
20
-
-
0043201362
-
Bias-temperature instabilities of polysilicon gate HfO2 MOSFETs
-
June
-
K. Onishi et al., "Bias-temperature instabilities of polysilicon gate HfO2 MOSFETs", IEEE Transactions on Electron Devices, vol. 50, no6, June 2003.
-
(2003)
IEEE Transactions on Electron Devices
, vol.50
, Issue.NO6
-
-
Onishi, K.1
-
21
-
-
33744905856
-
Mechanism for stress induced leakage currents in thin silicon dioxide films
-
September
-
D.J. DiMaria, E. Cartier, "Mechanism for stress induced leakage currents in thin silicon dioxide films", J. Appl. Phys. 78, September 95, pp. 3883-3894
-
(1995)
J. Appl. Phys
, vol.78
, pp. 3883-3894
-
-
DiMaria, D.J.1
Cartier, E.2
-
22
-
-
0034784919
-
-
J. Suñé and E. Wu, A new quantitative hydrogen-based model for ultra-thin oxide breakdown, VLSI01, p.97-98.
-
J. Suñé and E. Wu, "A new quantitative hydrogen-based model for ultra-thin oxide breakdown", VLSI01, p.97-98.
-
-
-
-
23
-
-
0000814330
-
Anode hole injection and trapping in silicon dioxide
-
July
-
D.J. DiMaria, E. Cartier and D. A. Buchanan, "Anode hole injection and trapping in silicon dioxide", Journal Applied Physics, Vol. 80, July 1996, pp. 304-317
-
(1996)
Journal Applied Physics
, vol.80
, pp. 304-317
-
-
DiMaria, D.J.1
Cartier, E.2
Buchanan, D.A.3
-
24
-
-
0036475593
-
On interface and oxide degradation in VLSI MOSFETs-PartII: Fowler-Nordheim stress regime
-
February
-
D. Esseni, J. D. Bude and L. Selmi, "On interface and oxide degradation in VLSI MOSFETs-PartII: Fowler-Nordheim stress regime", IEEE Trans. Elect. Dev., vol 49, no 2, February 2002, pp. 254-263.
-
(2002)
IEEE Trans. Elect. Dev
, vol.49
, Issue.2
, pp. 254-263
-
-
Esseni, D.1
Bude, J.D.2
Selmi, L.3
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