Charge trapping and annealing in high-k gate dielectrics

IEEE Transactions on Nuclear Science

Volumn 51, Issue 6 II, 2004, Pages 3143-3149

  Felix, James A ^a   Shaneyfelt, Marty R ^a   Fleetwood, Daniel M ^b   Schwank, James R ^a   Dodd, Paul E ^a   Gusev, Evgeni P ^c   Fleming, Robert M ^a   D'Emic, Chris ^c  

^a SANDIA NATIONAL LABORATORIES   (United States)

^b VANDERBILT UNIVERSITY   (United States)

^c IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

Alternative dielectric; Annealing; Bias dependence; High k; Interface trap; Mos capacitor; Oxide trapped charge; Processing; Radiation effects; Radiation response; Reliability

Indexed keywords

ANNEALING; EXTRAPOLATION; MOS CAPACITORS; PROCESSING; RADIATION EFFECTS; RELIABILITY; VOLTAGE MEASUREMENT;

ALTERNATIVE DIELECTRIC; BIAS DEPENDENCE; INTERFACE TRAP; OXIDE TRAPPED CHARGE; RADIATION RESPONSE;

DIELECTRIC MATERIALS;

EID: 11144241354     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNS.2004.839204     Document Type: Conference Paper

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