Towards understanding degradation and breakdown of SiO2/high-k stacks

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2002, Pages 521-524

  Kauerauf, T ^b   Degraeve, R ^a   Cartier, E ^c   Govoreanu, B ^b   Blomme, P ^b   Kaczer, B ^a   Pantisano, L ^a   Kerber, A ^c   Groeseneken, G ^b  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c NONE

Author keywords

[No Author keywords available]

Indexed keywords

DIELECTRIC DEVICES; ELECTRIC BREAKDOWN; EXTRAPOLATION; GATES (TRANSISTOR); INTERFACES (MATERIALS); LEAKAGE CURRENTS; SUBSTRATES;

CONSTANT VOLTAGE STRESS (CVS);

SILICA;

EID: 0036923564     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

1. E.P. Gusev el al., IEDM Tech. Dig., pp 451-454, 2001
2. A.L.P. Rotondaro et al., VLSI Technology, pp 148-149, 2002
3. S.J. Lee et al., VLSI Technology, pp 78-79, 2002
4. K. Onishi et al., IEDM Tech. Dig., pp 659-662, 2001
5. A. Kerber et al., VLSI Technology, pp 76-77, 2002
6. R. Degraeve et al., IEDM Tech. Dig., pp 327-330, 1999
7. J.R. Hauser et al, Characterization and Metrology for ULSI Technology, 1998 International, Conference, pp235
8. P.J. Roussel et al. IEEE Trans. Elec. Dev., vol. 1, No 2, June 2001
9. T. Kauerauf et al., IEEE Elec. Dev. Lett. vol. 23, No 4, April 2002
10. M.A. Alam et al., Proc. IRPS, pp 21-26, 2000
11. B.P. Linder et al., VLSI Technology, pp 214-215, 2000