Effect of pre-existing defects on reliability assessment of high-K gate dielectrics

Microelectronics Reliability

Volumn 44, Issue 9-11 SPEC. ISS., 2004, Pages 1509-1512

  Bersuker, G ^a   Sim, J H ^a   Young, C D ^a   Choi, R ^a   Zeitzoff, P M ^a   Brown, G A ^a   Lee, B H ^a   Murto, R W ^a  

^a SEMATECH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DRAIN CURRENTS; GATE DIELECTRICS; NMOS TRANSISTORS; THRESHOLD VOLTAGES;

ANNEALING; CHEMICAL VAPOR DEPOSITION; CURRENT DENSITY; ELECTRIC POTENTIAL; ELECTRODES; ELECTRON TRAPS; FIELD EFFECT TRANSISTORS; METALLORGANIC CHEMICAL VAPOR DEPOSITION; SUBSTRATES; WSI CIRCUITS;

DIELECTRIC MATERIALS;

EID: 4544251907     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2004.07.048     Document Type: Conference Paper

References (7)

1. H.R.Huff et al., Micrielectrinic Eng. 2003, 69, p. 152
2. G. Bersuker et al., Materials Today, January 2004, p.26
3. A. S. Foster et al., Phys.Rev. B, 2002, 65, p.174117
4. G. Bersuker et al., to be published in JJAP.
5. A. Kerber et al., IEEE-IRPS Proceedings, 2003, p.41
6. C. Young et al., IEEE-IRPS Proceedings, 2004
7. J. Sim et al., submitted to IEEE-EDL.