A review of recent advances in thermal management in three dimensional chip stacks in electronic systems

Journal of Electronic Packaging

Volumn 133, Issue 4, 2011, Pages

  Venkatadri, Vikram ^a   Sammakia, Bahgat ^a   Srihari, Krishnaswami ^a   Santos, Daryl ^a  

^a State University of New York   (United States)

Author keywords

3D chip stacks; 3D integration; thermal management; through silicon vias (TSVs)

Indexed keywords

ELECTRIC NETWORK ANALYSIS; INTEGRATED CIRCUIT INTERCONNECTS; SILICON; THERMAL MANAGEMENT (ELECTRONICS); THERMOANALYSIS; THREE DIMENSIONAL INTEGRATED CIRCUITS;

3-D INTEGRATION; 3D CHIP STACK; ELECTRONICS SYSTEM; PLANAR CIRCUIT; SIGNAL DELAYS; THERMAL MANAGEMENT STRATEGY; THREE DIMENSIONAL (3D) INTEGRATION; THREE-DIMENSIONAL CHIPS; THROUGH SILICON VIAS; THROUGH-SILICON-VIAS;

TEMPERATURE CONTROL;

EID: 83455264462     PISSN: 10437398     EISSN: 15289044     Source Type: Journal    
DOI: 10.1115/1.4005298     Document Type: Article

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