Thermal analysis of heterogeneous 3-D ICs with various integration scenarios

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2001, Pages 681-684

  Chiang, Ting Yen ^a   Souri, Shukri J ^a   Chui, Chi On ^a   Saraswat, Krishna C ^a  

^a Stanford University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COMPUTER SIMULATION; CURRENT DENSITY; ELECTRIC CONDUCTIVITY; FINITE ELEMENT METHOD; HEAT LOSSES; HEAT RESISTANCE; INTEGRATED CIRCUIT LAYOUT; OPTICAL INTERCONNECTS; THERMAL CONDUCTIVITY; THERMOANALYSIS; THREE DIMENSIONAL;

ANSYS SOFTWARE PACKAGE; ELECTRICAL THERMAL ANALOGY; ELMORE DELAY MODEL; INTERLAYER DIELECTRICS; TWO LAYER THREE DIMENSIONAL STRUCTURE; WAFER BONDING TECHNIQUE;

INTEGRATED CIRCUITS;

EID: 0035715858     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)