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Volumn , Issue , 2008, Pages 123-126

Technologies for 3D wafer level heterogeneous integration

Author keywords

[No Author keywords available]

Indexed keywords

3-D ARCHITECTURES; 3-D INTEGRATIONS; ELECTRICAL PERFORMANCE; FORM FACTORS; FRAUNHOFER; HETEROGENEOUS INTEGRATIONS; HIGH-DENSITY INTERCONNECTS; ON WAFERS; REDISTRIBUTION LAYERS; TECHNOLOGY PORTFOLIOS; THROUGH-SILICON VIAS; WAFER LEVELS;

EID: 62349108063     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DTIP.2008.4752966     Document Type: Conference Paper
Times cited : (48)

References (11)
  • 1
    • 84869242392 scopus 로고    scopus 로고
    • International Technical Roadmap of Semiconductors
    • International Technical Roadmap of Semiconductors, TWG A&P, www.itrs.org
    • TWG A&P
  • 2
    • 62349088907 scopus 로고    scopus 로고
    • F. Binder; Low Cost Si Carrier - 3D for high density modules, 3D Architecture for Semiconductor Integration and Packaging; San Francisco; Oct.22-24. 2007
    • F. Binder; "Low Cost Si Carrier - 3D for high density modules", 3D Architecture for Semiconductor Integration and Packaging; San Francisco; Oct.22-24. 2007
  • 3
  • 5
    • 50049116230 scopus 로고    scopus 로고
    • 3D System Integration: Enabling Technologies and Applications
    • Yokohama
    • P. Ramm, "3D System Integration: Enabling Technologies and Applications", International Conference SSDM 2006, Yokohama (2006) 318-319
    • (2006) International Conference SSDM , pp. 318-319
    • Ramm, P.1
  • 6
    • 62349136351 scopus 로고
    • Method of making a vertically integrated circuit
    • US Patent 5,766,984, Sep. 22, DE
    • P. Ramm and R. Buchner, "Method of making a vertically integrated circuit", US Patent 5,766,984, Sep. 22, 1994 [DE]
    • (1994)
    • Ramm, P.1    Buchner, R.2
  • 7
    • 4444275224 scopus 로고    scopus 로고
    • Vertical system integration by using inter-chip vias and solid-liquid-interdiffusion bonding
    • P. Ramm, A. Klumpp, R. Merkel, J. Weber, R. Wieland, "Vertical system integration by using inter-chip vias and solid-liquid-interdiffusion bonding", Japanese Journal of Applied Physics Vol. 43, No. 7A (2004) 829-830
    • (2004) Japanese Journal of Applied Physics , vol.43 , Issue.7 A , pp. 829-830
    • Ramm, P.1    Klumpp, A.2    Merkel, R.3    Weber, J.4    Wieland, R.5
  • 10
    • 34250797327 scopus 로고    scopus 로고
    • B. Wunderle, R. Mrossko, O. Wittier, E. Kaulfersch, P. Ramm, B. Michel, H. Reichl, Thermo-Mechanical Reliability of 3D-Integrated Microstructures in Stacked Silicon, Mater. Res. Soc. Symp. Proc. 970, MRS 2006 Fall Meeting, Boston, edited by C. A. Bower, P. E. Garrou, P. Ramm, K. Takahashi, Materials Research Society, Warrendale, Pennsylvania (2007) 67-78.
    • B. Wunderle, R. Mrossko, O. Wittier, E. Kaulfersch, P. Ramm, B. Michel, H. Reichl, "Thermo-Mechanical Reliability of 3D-Integrated Microstructures in Stacked Silicon", Mater. Res. Soc. Symp. Proc. 970, MRS 2006 Fall Meeting, Boston, edited by C. A. Bower, P. E. Garrou, P. Ramm, K. Takahashi, Materials Research Society, Warrendale, Pennsylvania (2007) 67-78.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.