Forced convective interlayer cooling in vertically integrated packages

2008 11th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, I-THERM

Volumn , Issue , 2008, Pages 1114-1125

  Brunschwiler, Thomas ^a   Michel, B ^a   Rothuizen, Hugo ^a   Kloter, U ^a   Wunderle, B ^c   Oppermann, H ^c   Reichl, H ^b  

^a IBM RESEARCH ZURICH   (Switzerland)

^b TECHNISCHE UNIVERSITÄT BERLIN   (Germany)

^c FRAUNHOFER IZM   (Germany)

Author keywords

3D chip stacks; Cross flow; Direct liquid cooling; Forced convective single phase heat transfer; In line; Integrated cooling; Interlayer cooling; Microchannel; Pin fin; Staggered; Vertically integrated packages

Indexed keywords

ABSORPTION; COMPUTATIONAL FLUID DYNAMICS; COOLANTS; DEWATERING; ELECTRONICS ENGINEERING; FIGHTER AIRCRAFT; FLUID DYNAMICS; FLUID MECHANICS; FORMING; HEATING EQUIPMENT; REYNOLDS NUMBER; THERMOMECHANICAL TREATMENT;

3D CHIP STACKS; CROSS-FLOW; DIRECT LIQUID COOLING; FORCED CONVECTIVE SINGLE-PHASE HEAT TRANSFER; IN-LINE; INTEGRATED COOLING; INTERLAYER COOLING; MICROCHANNEL; PIN FIN; STAGGERED; VERTICALLY INTEGRATED PACKAGES;

COOLING WATER;

EID: 50949107457     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ITHERM.2008.4544386     Document Type: Conference Paper

References (18)

1. R. Havemann and J. Hutchby, "High-Performance Interconnects: An Integration Overview", Proc. IEEE, May 2001, Vol. 89, 586-601.
2. K. Bernstein et al., "Interconnects in the Third Dimension: Design Challenges for 3D ICs", Proc. Design Automation Conference, June 2007, San Diego CA, 562-567.
3. E. Wong and S. Lim, "3D Floorplanning with Thermal Vias", Proc. Design, Automation and Test in Europe DATE 06, March 2006, Vol. 1, 1-6.
4. E.G. Colgan et al., "A Practical Implementation of Silicon Microchannel Coolers for High Power Chips", IEEE Trans. Components Packaging Technol., Vol. 30, No. 2., June 2007, 218-225.
5. T. Brunschwiler, H. Rothuizen, M. Fabbri, U. Kloter, and B. Michel, "Direct Liquid-Jet Impingement Cooling with Micron-Sized Nozzle Array and Distributed Return Architecture", Proc. ITHERM 2006, San Diego, CA, 196-203.
6. H. Lee et al., "Thermal Characterization of High Performance MCP with Silicon Spacer Having Low Thermal Impedance", Proc. 21st Annual IEEE Semiconductor Thermal Measurement and Management Symp. SEMI-THERM 2005, March 2005, 322-326.
7. K. Takahashi et al., "Process Integration of 3D Chip Stack with Vertical Interconnection", Proc. 54th IEEE Electronic Components and Technology Conference, 2004, Vol. 1, 601-609.
8. X. Chen, K. Toh, and J. Chai, "Direct Liquid Cooling of a Stacked Multichip Module", Proc. Electronics Packaging Technology Conference, 2002, 380-384.
9. J. Koo, S. Im, L, Jiang, and K. Goodson, "Integrated Microchannel Cooling for Three-Dimensional Electronic Circuit Architectures", J. Heat Transfer, 2005, Vol. 127, 49-58.
10. Y. Peles, A. Kosar, C. Mishra, C. Kuo, and B. Schneider, "Forced Convective Heat Transfer Across a Pin Fin Micro Heat Sink", Int. J. Heat Mass Transfer, 2005, Vol. 48, 3615-3627.
11. R. Prasher et al., "Nusselt Number and Friction Factor of Staggered Arrays of Low Aspect Ratio Micropin-Fins under Cross Flow for Water as Fluid", J. Heat Transfer, February 2007, Vol. 129, 141-153.
12. A. Kosar and Y. Peles, "TCPT-2006-096.R2: Micro Scale Pin Fin Heat Sinks - Parametric Performance Evaluation Study", IEEE Trans.n Components Packaging Technol., 2007, Vol. 30, 855-865.
13. International Technology Roadmap for Semiconductors (ITRS), http://public.itrs.net.
14. R. Linderman, T. Brunschwiler, U. Kloter, H. Toy, and B. Michel, "Hierarchical Nested Surface Channels for Reduced Particle Stacking and Low-Resistance Thermal Interfaces", Proc. 23rd Annual IEEE Semiconductor Thermal Measurement and Management Symp. SEMI-THERM 2007, San Jose, CA, March 2007, 87-94.
15. P. Andry, C. Tsang, E. Sprogis, C. Patel, S. Wright, and B. Webb, "A CMOS-compatible Process for Fabricating Electrical Through-vias in Silicon", Proc. Electronic Components and Technology Conference, May 2006, 831-837.
16. D. Tuckerman and R. Pease, "High-performance heat sinking for VLSI", IEEE Electron Device Lett., 1981, Vol. 2, 126-129.
17. F. Incropera, Liquid Cooling of Electronic Devices By Single-Phase Convection, Wiley VCH, 1999, Chapter 3.
18. Y. Muzychka and M. Yovanovich, "Laminar Forced Convection Heat Transfer in the Combined Entry Region of Non-Circular Ducts", Trans, ASME, February 2004, Vol. 126, 54-61.