Impact of thermal through silicon via (TTSV) on the temperature profile of multi-layer 3-D device stack

2009 IEEE International Conference on 3D System Integration, 3DIC 2009

Volumn , Issue , 2009, Pages

  Singh, Shiv Govind ^a   Tan, Chuan Seng ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

3-D ICS; DELAY TIME; DEVICE RELIABILITY; GLOBAL WIRES; HEAT DISSIPATION; POWER DENSITIES; SHARP INCREASE; SI LAYER; SILICON LAYER; TEMPERATURE PROFILES; THERMAL ANALYSIS; THERMAL DISSIPATION; THROUGH-SILICON-VIA; WIRE PITCH;

THERMOANALYSIS; WIRE;

THREE DIMENSIONAL;

EID: 70549097058     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/3DIC.2009.5306527     Document Type: Conference Paper

References (0)