-
1
-
-
33746626966
-
Design space exploration for 3D architectures
-
Apr.
-
Y. Xie, G. H. Loh, B. Black, and K. Bersnstein, "Design space exploration for 3D architectures," ACM Journal on Emerging Technologies in Computing Systems, vol. 2, no. 2, pp. 65-103, Apr. 2006.
-
(2006)
ACM Journal on Emerging Technologies in Computing Systems
, vol.2
, Issue.2
, pp. 65-103
-
-
Xie, Y.1
Loh, G.H.2
Black, B.3
Bersnstein, K.4
-
2
-
-
84891309209
-
-
1st ed. Verlag GmbH & Co. KGaA, Weinheim: Wiley-VCH
-
P. Garrou, C. Bower, and P. Ramm, Handbook of 3D integration: technology and applications of 3D integrated circuits, 1st ed. Verlag GmbH & Co. KGaA, Weinheim: Wiley-VCH, 2008.
-
(2008)
Handbook of 3D Integration: Technology and Applications of 3D Integrated Circuits
-
-
Garrou, P.1
Bower, C.2
Ramm, P.3
-
3
-
-
61549131161
-
3-D hyperintegration and packaging technologies for micronano systems
-
Jan.
-
J.-Q. Lu, "3-D hyperintegration and packaging technologies for micronano systems," Proceedings of the IEEE, vol. 97, no. 1, pp. 18-30, Jan. 2009.
-
(2009)
Proceedings of the IEEE
, vol.97
, Issue.1
, pp. 18-30
-
-
Lu, J.-Q.1
-
4
-
-
61549132828
-
High-density through silicon vias for 3-D LSIs
-
Jan.
-
M. Koyanagi, T. Fukushima, and T. Tanaka, "High-density through silicon vias for 3-D LSIs," Proceedings of the IEEE, vol. 97, no. 1, pp. 49-59, Jan. 2009.
-
(2009)
Proceedings of the IEEE
, vol.97
, Issue.1
, pp. 49-59
-
-
Koyanagi, M.1
Fukushima, T.2
Tanaka, T.3
-
5
-
-
61549122276
-
Through-silicon via (TSV)
-
Jan.
-
M. Motoyoshi, "Through-silicon via (TSV)," Proceedings of the IEEE, vol. 97, no. 1, pp. 43-48, Jan. 2009.
-
(2009)
Proceedings of the IEEE
, vol.97
, Issue.1
, pp. 43-48
-
-
Motoyoshi, M.1
-
6
-
-
61549088065
-
Interconnect-based design methodologies for three-dimensional integrated circuits
-
Jan.
-
V. F. Pavlidis and E. G. Friedman, "Interconnect-based design methodologies for three-dimensional integrated circuits," Proceedings of the IEEE, vol. 97, no. 1, pp. 123-140, Jan. 2009.
-
(2009)
Proceedings of the IEEE
, vol.97
, Issue.1
, pp. 123-140
-
-
Pavlidis, V.F.1
Friedman, E.G.2
-
7
-
-
61549106848
-
3-D technology assessment: Path-finding the technology/design sweet-spot
-
Jan.
-
P. Marchal, B. Bougard, G. Katti, M. Stucchi, W. Dehaene, A. Papanikolaou, D. Verkest, B. Swinnen, and E. Beyne, "3-D technology assessment: path-finding the technology/design sweet-spot," Proceedings of the IEEE, vol. 97, no. 1, pp. 96-106, Jan. 2009.
-
(2009)
Proceedings of the IEEE
, vol.97
, Issue.1
, pp. 96-106
-
-
Marchal, P.1
Bougard, B.2
Katti, G.3
Stucchi, M.4
Dehaene, W.5
Papanikolaou, A.6
Verkest, D.7
Swinnen, B.8
Beyne, E.9
-
8
-
-
61549115557
-
3-D data storage power delivery, and RF/optical transceiver - Case studies of 3-D integration from system design perspectives
-
Jan.
-
T. Zhang, R. Micheloni, G. Zhang, Z. R. Huang, and J. J.-Q. Lu, "3-D data storage power delivery, and RF/optical transceiver - case studies of 3-D integration from system design perspectives," Proceedings of the IEEE, vol. 97, no. 1, pp. 161-174, Jan. 2009.
-
(2009)
Proceedings of the IEEE
, vol.97
, Issue.1
, pp. 161-174
-
-
Zhang, T.1
Micheloni, R.2
Zhang, G.3
Huang, Z.R.4
Lu, J.J.-Q.5
-
9
-
-
61649110276
-
Three-dimensional silicon integration
-
Nov.
-
J. U. Knickerbocker, P. S. Andry, B. Dang, R. R. Horton, M. J. Interrante, C. S. Patel, R. J. Polastre, K. Sakuma, R. Sirdeshmukh, E. J. Sprogis, S. M. Sri-Jayantha, A. M. Stephens, A. W. Topol, C. K. Tsang, B. C. Webb, and S. L. Wright, "Three-dimensional silicon integration," IBM J. RES. & DEV., vol. 52, no. 6, pp. 553-569, Nov. 2008.
-
(2008)
IBM J. Res. & Dev.
, vol.52
, Issue.6
, pp. 553-569
-
-
Knickerbocker, J.U.1
Andry, P.S.2
Dang, B.3
Horton, R.R.4
Interrante, M.J.5
Patel, C.S.6
Polastre, R.J.7
Sakuma, K.8
Sirdeshmukh, R.9
Sprogis, E.J.10
Sri-Jayantha, S.M.11
Stephens, A.M.12
Topol, A.W.13
Tsang, C.K.14
Webb, B.C.15
Wright, S.L.16
-
11
-
-
33845584146
-
Fabrication and electrical characterization of 3D vertical interconnects
-
DOI 10.1109/ECTC.2006.1645676, 1645676, Proceedings - IEEE 56th Electronic Components and Technology Conference
-
M. W. Newman, S. Muthukumar, M. Schuelein, T. Dambrauskas, P. A. Dunaway, J. M. Jordan, S. Kulkarni, C. D. Linde, T. A. Opheim, R. A. Stingel, W. Worwag, L. A. Topic, and J. M. Swan, "Fabrication and electrical characterization of 3D verical interconnects," in Proc. of the IEEE Int'l Electronic Components and Technology Coference, 2006, pp. 394-398. (Pubitemid 44929706)
-
(2006)
Proceedings - Electronic Components and Technology Conference
, vol.2006
, pp. 394-398
-
-
Newman, M.W.1
Muthukumar, S.2
Schuelein, M.3
Dambrauskas, T.4
Dunaway, P.A.5
Jordan, J.M.6
Kulkarni, S.7
Linde, C.D.8
Opheim, T.A.9
Stingel, R.A.10
Worwag, W.11
Topic, L.A.12
Swan, J.M.13
-
12
-
-
56349171261
-
Parametric yield management for 3D ICs: Models and strategies for improvement
-
Article 19, Oct.
-
C. Ferri, S. Reda, and R. I. Bahar, "Parametric yield management for 3D ICs: models and strategies for improvement," ACM Journal on Emerging Technologies in Computing Systems, vol. 4, no. 4, Article 19, Oct. 2008.
-
(2008)
ACM Journal on Emerging Technologies in Computing Systems
, vol.4
, Issue.4
-
-
Ferri, C.1
Reda, S.2
Bahar, R.I.3
|